- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1909 > CS8952-IQZ (Cirrus Logic Inc)IC TXRX 100/10 PHY 100TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | CS8952-IQZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 65/81頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TXRX 100/10 PHY 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁(yè)面： | 759 (CN2011-ZH PDF) |
| 其它名稱： | 598-1208 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)當(dāng)前第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
68
DS206F1
MII Interface Pins
COL/PHYAD0 - Collision Detect/PHY Address 0. Input/Tri-State Output, Pin 48.
Asserted active-high to indicate a collision on the medium during half-duplex operation. In full-duplex
operation, COL is undefined and should be ignored. When configured for 10 Mb/s operation, COL is
also used to indicate a Signal Quality Error (SQE) condition.
At power-up or at reset, the logic value on this pin is latched into bit 0 of the PHY Address field of the
Self Status Register (address 19h). This pin includes a weak internal pull-down (> 20 k
), or the value
may be set by an external 4.7 k
pull-up or pull-down resistor.
CRS/PHYAD2 - Carrier Sense/PHY Address 2. Input/Tri-State Output, Pin 49.
The operation of CRS is controlled by the REPEATER pin as follows:
At power-up or at reset, the logic value of this pin is latched into bit 2 of the PHY Address Field of the
Self Status Register (address 19h). This pin includes a weak internal pull-down (> 20 k
), or the value
may be set by an external 4.7 k
pull-up or pull-down resistor.
MDC - Management Data Clock. Input, Pin 28.
Input clock used to transfer serial data on MDIO. The maximum clock rate is 16.67 MHz. This clock may
be asynchronous to RX_CLK and TX_CLK.
MDIO - Management Data Input/Output. Bi-Directional, Pin 27.
Bi-directional signal used to transfer management data between the CS8952 and the Ethernet controller.
In order to conform with Annex 22B of the IEEE 802.3u specification, the MII_DRV pin should be pulled
high during power-up or reset, and the MDIO pin should have an external 1.5 k
pull-up resistor. For
systems not required to drive external connectors and cables as described in the IEEE802.3u
specification, the external pull-up resistor may not be necessary.
MII_IRQ - MII Interrupt. Open Drain Output, Pin 26.
Asserted low to indicate the status corresponding to one of the unmasked interrupt status bits in the
Interrupt Status Register (address 11h) has changed. It will remain low until the ISR is read, clearing all
status bits.
This open drain pin requires a 4.7 k
pull-up resistor.
RX_CLK - Receive Clock. Tri-State Output, Pin 36
Continuous clock output used as a reference clock for sampling RXD[3:0], RX_ER, and RX_DV.
RX_CLK will have the following nominal frequency:
REPEATER pin
DUPLEX mode
CRS Indicates
high
don’t care
receive activity only
low
full duplex
receive activity only
low
half duplex
receive or transmit activity
Speed
10BT_SER pin
Nominal frequency
100 Mb/s
n/a
25 MHz
10 Mb/s
low (parallel)
2.5 MHz
10 Mb/s
high (serial)
10 MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY8CLED04DOCD1-56LTXI | IC POWERPSOC DEBUG 4CH 1A 56VQFN |
| CYG2217 | IC MOD PHONE LINE WIRE 1.07" PCB |
| DAC312ER | IC DAC 12BIT MULT HS 20-CDIP |
| DAC8143FPZ | IC DAC 12BIT DAISYCHAIN 16DIP |
| DAC8228FSZ | IC DAC 8BIT DUAL V-OUT 20SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS8952-IQZR | 功能描述:以太網(wǎng) IC IC 100BASE-TX and 10BASE-T Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| CS8952T | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-CQ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQR | 制造商:Cirrus Logic 功能描述:ETHERNET TXRX SGL CHIP 1-PORT 5V 10MBPS/100MBPS 100TQFP - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。