參數(shù)資料
型號: CS8952-IQZ
廠商: Cirrus Logic Inc
文件頁數(shù): 55/81頁
文件大小: 0K
描述: IC TXRX 100/10 PHY 100TQFP
標準包裝: 90
類型: 收發(fā)器
規(guī)程: MII
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 759 (CN2011-ZH PDF)
其它名稱: 598-1208
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
59
DS206F1
5
CIM Status
Read Only
0
When clear, this bit indicates that a stable link con-
nection has been detected. When an unstable link is
detected and the Carrier Integrity Monitor Disable bit
in the PCS Sub-Layer Configuration Register
(address 17h) is clear, this bit is set and latched. It
will remain set until this register is read.
4:0
PHY Address Field Read/Write Reset to the val-
ues on the
PHYAD[4:0] pins.
The value on pins PHYAD[4:0] are latched into this
field at power-up or reset. These bits define the PHY
address used by the management layer to address
the PHY. The external logic must know this address
in order to select this particular CS8952’s registers
individually via the MDIO and MDC pins.
BIT
NAME
TYPE
RESET
DESCRIPTION
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