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參數(shù)資料
| 型號(hào)： | EWIXP455ABT |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 266 MHz, RISC PROCESSOR, PBGA544 |
| 封裝： | LEAD FREE, PLASTIC, BGA-544 |
| 文件頁(yè)數(shù)： | 148/163頁(yè) |
| 文件大?。?/td> | 1123K |
| 代理商： | EWIXP455ABT |
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Package Information
May 2005
Intel IXP45X and Intel IXP46X Product Line of Network Processors Datasheet
85
Document Number: 306261-002
Table 23.
GPIO Interface
Name
Power
on
Reset
Normal
After
Reset
Until
Software
Enables
Normal
After
Software
Enables
Type
Description
GPIO[12:0]
Z
VI
VB
I/O
General purpose Input/Output pins. May be configured as an input or an output. As an input, each signal
may be configured a processor interrupt. Default after reset is to be configured as inputs. Some GPIO may
serve as an optional alternate function.
Refer to Section 3.1.12, “GPIO” on page 28, for additional details on alternate function mapping.
Should be pulled high using a 10-K
resistor when not being utilized in the system.
GPIO[13]
Z
VI
VB
I/O
General purpose input/output pins. May be configured as an input or an output. Default after reset is to be
configured as inputs. Some GPIO may serve as an optional alternate function.
Refer to Section 3.1.12, “GPIO” on page 28, for additional details on alternate function mapping.
Should be pulled high using a 10-K
resistor when not being utilized in the system.
GPIO[14]
Z
VI
VB
I/O
Can be configured the same as GPIO Pin 13 or as a clock output. Configuration as an output clock can be
set at various speeds of up to 33 MHz with various duty cycles. Configured as an input, upon reset. Some
GPIO may serve as an optional alternate function.
Refer to Section 3.1.12, “GPIO” on page 28, for additional details on alternate function mapping.
Should be pulled high through a 10-K
resistor when not being utilized in the system.
GPIO[15]
Z
clkout /
VO
VB
I/O
Can be configured the same as GPIO Pin 13 or as a clock output. Configuration as an output clock can be
set at various speeds of up to 33 MHz with various duty cycles. Configured as an output, upon reset. Can
be used to clock the expansion interface, after reset. Some GPIO may serve as an optional alternate
function.
Refer to Section 3.1.12, “GPIO” on page 28, for additional details on alternate function mapping.
Should be pulled high through a 10-K
resistor when not being utilized in the system. The interface should
be set to an input in the not used configuration.
NOTE:
This table discusses all features supported on the Intel IXP45X and Intel IXP46X Product Line of Network Processors. For details on feature support listed by
processor, see Table 1 on page 14.
For a legend of the Type codes, see Table 10 on page 46.
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