參數(shù)資料
型號(hào): GE28F128W30B90
英文描述: CHIP RESISTOR
中文描述: 的EEPROM | FLASH動(dòng)畫(huà)| 8M × 16位|的CMOS | BGA封裝| 60PIN |塑料
文件頁(yè)數(shù): 43/91頁(yè)
文件大小: 994K
代理商: GE28F128W30B90
1.8 Volt Intel
Wireless Flash Memory with 3 Volt I/O
Datasheet
43
8.0
Set Configuration Register
The Set Configuration Register command sets the burst order, frequency configuration, burst
length, and other parameters.
A two-bus cycle command sequence initiates this operation. The configuration register data is
placed on the lower 16 bits of the address bus (A[15:0]) during both bus cycles. The Set
Configuration Register command is written along with the configuration data (on the address bus).
This is followed by a second write that confirms the operation and again presents the configuration
register data on the address bus. The configuration register data is latched on the rising edge of
ADV#, CE#, or WE# (whichever occurs first). This command functions independently of the
applied V
PP
voltage. After executing this command, the device returns to read-array mode. The
configuration register’s contents can be examined by writing the Read Identifier command and
then reading location 05h. (See
Table 13
and
Table 14
.)
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