- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67672 > GT- 32090 (Galileo Technology Services, LLC) Highly Integrated Single-Chip System Controller(高集成單片系統(tǒng)控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | GT- 32090 |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Highly Integrated Single-Chip System Controller(高集成單片系統(tǒng)控制器) |
| 中文描述： | 高度集成的單芯片系統(tǒng)控制器（高集成單片系統(tǒng)控制器） |
| 文件頁(yè)數(shù)： | 12/67頁(yè) |
| 文件大?。?/td> | 524K |
| 代理商： | GT- 32090 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)當(dāng)前第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)
GT-32090 System Controller For i960JX Processors
2
Galileo
Technology, Inc.
OVERVIEW
The GT-32090 is a low cost, highly integrated single-chip
System Controller for the i960Jx Family. It provides high
system performance, while reducing cost, complexity,
device count, and board space. The GT-32090 controls
two separate and independent buses, the CPU’s 16 to
33MHz 32-bit wide address/data bus, and a 16-bit I/O
bus. The two buses can work concurrently at different fre-
quencies.
The DRAM Controller supports up to 128MBytes of stan-
dard or EDO DRAM. It supports up to four 32-bit wide
banks directly, or up to eight banks indirectly, with zero
wait states to first data or burst data at 16 and 20MHz. At
25 and 33MHz, there is one wait state and two wait
states respectively, to first data, and at both frequencies
there are no wait states to burst data. Various refresh and
addressing modes are supported.
The Device Controller supports up to 4 devices directly,
and includes various programmable timing and wait state
mechanisms that can be setup individually for each
device. Typical devices supported include DRAM, ROM,
Flash, and SRAM, as well as high-performance master
peripherals.
The powerful three-channel DMA Controller has data
alignment capabilities and sophisticated chaining support
via link lists. The DMA can move data between devices
on the CPU bus, or between devices on the CPU bus and
devices on the I/O bus. DMA transfers can go through an
on-board 16-byte FIFO, or directly if in fly-by mode.
Packing and unpacking of 8-bit and 16-bit data from/to
the I/O bus occurs concurrently with activity on the CPU
bus, increasing overall system bandwidth.
The I/O bus is a simple 16-bit read/write bus that inter-
faces to a large variety of low cost support components
like UARTs, SCSI controllers, Ethernet controllers, and
other devices. The I/O bus supports 8- or 16-bit peripher-
als, as well as slave DMA and PCMCIA devices. Three 4-
byte FIFOs provide efficient support for the gathering of
8-bit or 16-bit data to/from different peripherals, in the
endianess chosen by the designer.
The GT-32090 includes a direct interface to two 8-bit or
16-bit PCMCIA slots.
REFERENCE DESIGN
Galileo makes available the Galileo-5 Evaluation and
Development System, an ISA card which greatly facili-
tates the development of embedded control systems
based on the i960JA/JD/JF Intel processors.
The centerpiece of the system is the GT-32090 System
Controller, which integrates most of the core logic neces-
sary in embedded applications.
The Galileo-5 board serves two main objectives:
a) It allows customers to easily evaluate the performance
of a GT-32090 based system, using their own software,
as opposed to generic benchmarks.
b) It greatly facilitates and expedites the development of
the final product, since hardware designers can use its
design as a reference and software designers can use it
to start porting software ahead of their own hardware
platform.
The shipping configuration of the Galileo-5 includes a
33MHz i960JA CPU, 4MBytes of DRAM, sockets for
2MBytes of Flash, a 512KByte EPROM, a DUART, Intel
MON960 software, and 2 PCMCIA sockets. Jumpers
allow customers to evaluate a large variety of system
configurations, and expansion connectors allow cus-
tomer-designed options to be easily interfaced to.
The Galileo-5 can either be used in stand-alone fashion,
or it can be plugged directly into an ISA slot of standard
personal computers.
CPU Interface
16
Byte
FIFO
AD Bus
Device
Controller
DRAM
Controller
16-Bit I/O Bus
4-Byte
Gathering
FIFO
I/O Arbiter
DMA Arbiter
JTAG
4-Byte
Gathering
FIFO
4-Byte
Gathering
FIFO
16-Bit
Bypass
Path
Byte Alignment
SIO
Device
Control
PCMCIA
Control
Linked List Control
DMA
CHannel
2
DMA
CHannel
1
DMA
CHannel
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GT-48001A | Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器) |
| GT-48002A | Switched Fast Ethernet Controller for 100BaseX(100BaseX交換式快速以太網(wǎng)控制器) |
| GT-48004A | Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器) |
| GT-48006A | Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、雙端口10/100Mbps以太網(wǎng)橋式/交換式控制器) |
| GT-48207 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級(jí)交換式 10+10/100 BaseX以太網(wǎng)控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GT-32090-A0-PBN-C000 | 制造商:Marvell 功能描述: |
| GT3-20DP-2.5DSA | 制造商:HRS 制造商全稱:HRS 功能描述:Antenna, Sensor, and Communications Trunk Line Connections |
| GT321 | 制造商:CORNELL DUBILIER ELECTRONICS 功能描述:Cap Ceramic 220pF 3000V SL 5% (20 X 6mm) Radial 9.5mm 85°C |
| GT32-10P-1.5H | 制造商:Hirose 功能描述: |
| GT32-10S-6/CR-MP | 制造商:Hirose 功能描述:902-5118-4-00 EACH 制造商:Hirose 功能描述:GT32-10S-6/CR-MP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。