參數(shù)資料
型號: IDT88K8483BRI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 32/162頁
文件大小: 0K
描述: IC SPI-4 EXCHANGE 3PORT 672-BGA
標準包裝: 24
系列: *
其它名稱: 88K8483BRI
127 of 162
October 20, 2006
IDT IDT88K8483
PFP Egress Status Monitor Register - 1
PFP Egress Status Monitor Register - 2
PFP Egress Status Monitor Register - 3
PFP Egress Status Monitor Register - 4
PFP Internal Parity Error Indication Register
Field
Read /
Write
Bits
Length Reset
State
Description
STATUS[0:15]
R
0:0-3:7
32
0x00
Indicates status for lid 0-15
Note: (1) The egress status has the same definition as described in the OIF SPI-4 implementation agreement (OIF-SPI-4-02.1) and is shown in PFP Ingress Sta-
(2) The egress status reflects the status received from the status channel.
Table 110 PFP Egress Status Monitor Register - 1
(Block Base=0x1700/0x1F00, Register Offset=0x09)
Field
Read /
Write
Bits
Length Reset
State
Description
STATUS[16:31]
R
0:0-3:7
32
0x00
Indicates status for lid 16-31
Table 111 PFP Egress Status Monitor Register - 2
(Block Base=0x1700/0x1F00, Register Offset=0x0A)
Field
Read /
Write
Bits
Length Reset
State
Description
STATUS[32:47]
R
0:0-3:7
32
0x00
Indicates status for lid 32-47
Table 112 PFP Egress Status Monitor Register - 3
(Block Base=0x1700/0x1F00, Register Offset=0x0B)
Field
Read /
Write
Bits
Length Reset
State
Description
STATUS[48:63]
R
0:0-3:7
32
0x00
Indicates status for lid 48-63.
Table 113 PFP Egress Status Monitor Register - 4
(Block Base=0x1700/0x1F00, Register Offset=0x0C)
Field
Read /
Write
Bits
Length Reset
State
Description
P_ERROR_I
R/W
0:0
1
0
0: Internal memory parity error did not occur.
1:Internal memory parity error occurred.
Write 1: Clear the field.
P_ERROR_INS
R/WC
0:1
1
0
Writing 1 generates a single parity error, self clear.
Table 114 PFP Internal Parity Error Indication Register (Block Base=0x1700/0x1F00, Register Offset=0x0D)
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