參數資料
型號: IDT88K8483BRI
廠商: IDT, Integrated Device Technology Inc
文件頁數: 50/162頁
文件大?。?/td> 0K
描述: IC SPI-4 EXCHANGE 3PORT 672-BGA
標準包裝: 24
系列: *
其它名稱: 88K8483BRI
143 of 162
October 20, 2006
IDT IDT88K8483
PMON M-T Illegal SOP Event LID Field Register
PMON M-T Illegal EOP Event LID Field Register
PMON T-M Packet Cut-Down LID Field Register
PMON M-T Packet Cut-Down LID Field Register
Field
Read /
Write
Bits
Length Reset
State
Description
LID
R
0:0-0:5
6
0
This event is generated when consecutive SOPs are received at the main SPI4
interface. The LID connected with the event is indicated in the register.
Table 150 PMON M-T Illegal SOP Event Field Register (Block Base=0x0F00, Register Offset=0x0F)
Field
Read /
Write
Bits
Length Reset
State
Description
LID
R
0:0-0:5
6
0
This event is generated when consecutive EOPs are received at the main SPI4
interface. The LID connected with the event is indicated in the register
Table 151 PMON M-T Illegal EOP Event Field Register (Block Base=0x0F00, Register Offset=0x10)
Field
Read /
Write
Bits
Length Reset
State
Description
LID
R
0:0-0:5
6
0
When the packet arriving at the tributary SPI-4 interface is larger than the storage
capability of the LID, this event is raised and the LID associated with the event is
indicated.
Table 152 PMON T-M Packet Cut-Down LID Field Register (Block Base=0x0F00, Register Offset=0x11)
Field
Read /
Write
Bits
Length Reset
State
Description
LID
R
0:0-0:5
6
0
When the packet arriving at the main is larger than the storage capability of the LID,
this event is raised and the LID associated with the event is indicated.
Table 153 PMON M-T Packet Cut-Down LID Field Register (Block Base=0x0F00, Register Offset=0x12)
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