參數資料
型號： IDT88P8344
廠商： Integrated Device Technology, Inc.
英文描述： SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0
中文描述： SPI交換4 ×的SPI - 3至SPI - 4期1.0
文件頁數： 53/98頁
文件大?。?/td> 601K
代理商： IDT88P8344
53
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006
I_SYNCH_EN
synchronization to in synchronization condition interrupt indication enable.
0=Disable synchronization interrupt
1=Enable synchronization interrupt
SPI-4 ingress data path has transitioned fromout of
I_BUS_ERR_EN
0=Disable bus error interrupt
1=Enable bus error interrupt
SPI-4 ingress bus error interrupt indication enable.
SPI4_INACTIVE_TRANSFER_EN
SPI-4 ingress inactive transfer inter-
rupt indication enable.
0=Disable inactive transfer interrupt
1=Enable inactive transfer interrupt
DCLK_UN_EN
SPI-4 ingress data clock has transitioned fromavailable
to an unavailable condition interrupt indication enable.
0=Disable unavailable interrupt
1=Enable unavailable interrupt
E_DIP_ERR_EN
on the SPI-4 egress status channel.
0=Disable DIP-2 error interrupt
1=Enable DIP-2 error interrupt
SPI-4 egress DIP-2 error interrupt indication enable
E_SYNCH_EN
SPI-4 egress status channel has transitioned fromout of
synchronization to in synchronization condition interrupt indication enable.
0=Disable synchronization interrupt
1=Enable synchronization interrupt
SCLK_UN_EN
SPI-4 egress status clock has transitioned fromavailable
to an unavailable condition interrupt indication enable. SCLK_UN_EN should
be written as a zero if using a SPI-4 egress LVTTL status clock that is less than
one-half of the MCLK frequency. The SCLK_UN_I interrupt indication is not
usable in this case.
0=Disable unavailable interrupt
1=Enable unavailable interrupt
Module status register (0x24 to 0x27 in the direct
accessed space)
TABLE 42 - MODULE STATUS REGISTER (0x24 TO
0x27 IN THE DIRECT ACCESSED SPACE)
Field
Bits
Length
1
1
1
1
1
3
Initial Value
0
0
0
0
0
0
SPI-34_CAPTURE
SPI-43_CAPTURE
SPI-34_INSERT
SPI-43_INSERT
PMON
Reserved
The Module Status registers (0x24 to 0x27 in the direct accessed space)
have read and write access, and interrupt status fields are cleared by a
mcroprocessor write cycle, where a logical one must be written to clear the
field(s) targeted, except for the PMON field, which can not be cleared.
0
1
2
3
4
7:5
The Module Status registers are secondary interrupt status registers and can
only be active if the corresponding field is active in the Primary Interrupt Status
Register (Direct 0x2C):
Module Status Register 0x24 is for module A, and can only be active if the
MODULE_A field is active in the Primary Interrupt Status Register.
Module Status Register 0x25 is for module B, and can only be active if the
MODULE_B field is active in the Primary Interrupt Status Register.
Module Status Register 0x26 is for module C, and can only be active if the
MODULE_C field is active in the Primary Interrupt Status Register.
Module Status Register 0x27 is for module D, and can only be active if the
MODULE_D field is active in the Primary Interrupt Status Register.
SPI-34_CAPTURE
rupt indication.
0=No capture event
1=Buffer is ready for reading by the mcroprocessor
SPI-3 ingress to SPI-4 egress capture event inter-
SPI-43_CAPTURE
indication.
0=No capture event
1=Buffer is ready for reading by the mcroprocessor
SPI-4 ingress to SPI-3 egress capture event interrupt
SPI-34_INSERT
SPI-3 ingress to SPI-4 egress insert event interrupt
indication.
0=No insert event
1=Buffer is ready for writing by the mcroprocessor
SPI-43_INSERT
indication.
0=No insert event
1=Buffer is ready for writing by the mcroprocessor
SPI-4 ingress to SPI-3 egress insert event interrupt
PMON
Performance Monitor event interrupt indication. Writing to this field has
no effect.
0=No PMON event
1=PMON event is ready for reading by the mcroprocessor
Module enable register (0x28 to 0x2B in the direct
accessed space)
The Module Enable registers (0x28 to 0x2B in the direct accessed space)
have read and write access.
Module Enable Register 0x28 is for module A.
Module Enable Register 0x29 is for module B.
Module Enable Register 0x2A is for module C.
Module Enable Register 0x2B is for module D.
Field
Bits
Length
1
1
1
1
1
3
Initial Value
0
0
0
0
0
0
SPI-34 CAPTURE_EN
SPI-43 CAPTURE_EN
SPI-34 INSERT_EN
SPI-43 INSERT_EN
PMON_EN
Reserved
0
1
2
3
4
7:5
TABLE 43 - MODULE ENABLE REGISTER (0x28 TO
0x2B IN THE DIRECT ACCESSED SPACE)
相關PDF資料
PDF描述
IDT88P8344BHGI SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0
IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MODULES
IDTCSP2510DPGI 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
IDTCSP2510DPG SENSOR OPTICAL SLOTTED 1.0MM
IDTCSP2510D 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
相關代理商/技術參數
參數描述
IDT88P8344BHGI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數據傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝
IDT88P8344BHI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數據傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝
IDT89H10T4BG2ZBBC 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA
IDT89H10T4BG2ZBBC8 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA
IDT89H10T4BG2ZBBCG 功能描述:IC PCI SW 10LANE 4PORT 324BGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數據傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*