tCES tCS D27 D26 D25 D24 t
參數(shù)資料
型號(hào)： LMK04000BEVALXO
廠商： National Semiconductor
文件頁數(shù)： 11/65頁
文件大?。?/td> 0K
描述： BOARD EVAL PREC CLOCK PLL XO
標(biāo)準(zhǔn)包裝： 1
系列： PowerWise®
主要目的： 計(jì)時(shí)，時(shí)鐘調(diào)節(jié)器
嵌入式： 否
已用 IC / 零件： LMK04000
主要屬性： 122.88 MHz 晶體
次要屬性： 集成式 PLL 和 VCO
已供物品： 板，線纜
tCES
tCS
D27
D26
D25
D24
tCH
tCWH
tCWL
D23
D0
A3
A2
A1
A0
MSB
LSB
DATAuWire
CLKuWire
LEuWire
tES
tEWH
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Electrical Characteristics (continued)
(3.15 V
≤ VCC ≤ 3.45 V, -40 °C ≤ TA ≤ 85 °C. Typical values represent most likely parametric norms at VCC = 3.3 V, TA = 25
°C, at the Recommended Operating Conditions at the time of product characterization and are not guaranteed.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
TCWH
Clock Pulse Width High
See Microwire Input Timing
25
ns
TCWL
Clock Pulse Width Low
See Microwire Input Timing
25
ns
Clock to Latch Enable
TES
See Microwire Input Timing
25
ns
Set Up Time
TCES
Clock to Enable Setup Time
See Microwire Input Timing
25
ns
TEW
Load Enable Pulse Width
See Microwire Input Timing
25
ns
Serial Data Timing Diagram
Register programming information on the DATAuWire pin is clocked into a shift register on each rising edge of
the CLKuWire signal. On the rising edge of the LEuWire signal, the register is sent from the shift register to the
register addressed. A slew rate of at least 30 V/s is recommended for these signals. After programming is
complete the CLKuWire, DATAuWire, and LEuWire signals should be returned to a low state. If the CLKuWire or
DATAuWire lines are toggled while the VCO is in lock, as is sometimes the case when these lines are shared
with other parts, the phase noise may be degraded during this programming.
Charge Pump Current Specification Definitions
I1 = Charge Pump Sink Current at VCPout = VCC - ΔV
I2 = Charge Pump Sink Current at VCPout = VCC/2
Copyright 2008–2011, Texas Instruments Incorporated
19
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