參數(shù)資料
型號: LMK04000BEVALXO
廠商: National Semiconductor
文件頁數(shù): 36/65頁
文件大小: 0K
描述: BOARD EVAL PREC CLOCK PLL XO
標(biāo)準(zhǔn)包裝: 1
系列: PowerWise®
主要目的: 計(jì)時(shí),時(shí)鐘調(diào)節(jié)器
嵌入式:
已用 IC / 零件: LMK04000
主要屬性: 122.88 MHz 晶體
次要屬性: 集成式 PLL 和 VCO
已供物品: 板,線纜
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Table 29. PLL_MUX: LD Pin Selectable Outputs
PLL_MUX [4:0]
LD Output
b4
b3
b2
b1
b0
0
HiZ
0
1
Logic High
0
1
0
Logic Low
0
1
PLL2 Digital Lock Detect Active High
0
1
0
PLL2 Digital Lock Detect Active Low
0
1
0
1
PLL2 Analog Lock Detect Push Pull
0
1
0
PLL2 Analog Lock Detect Open Drain NMOS
0
1
PLL2 Analog Lock Detect Open Drain PMOS
0
1
0
Reserved
0
1
0
1
PLL2_N Divider Output / 2
0
1
0
1
0
Reserved
0
1
0
1
PLL2_R Divider Output / 2
0
1
0
Reserved
0
1
0
1
Reserved
0
1
0
PLL1 Digital Lock Detect Active HIGH
0
1
PLL1 Digital Lock Detect Active LOW
1
0
Reserved
1
0
1
Reserved
1
0
1
0
Reserved
1
0
1
Reserved
1
0
1
0
PLL1_N Divider Output / 2
1
0
1
0
1
Reserved
1
0
1
0
PLL1_R Divider Output / 2
1
0
1
PLL1 and PLL2 Digital Lock Detect
1
0
Inverted PLL1 and PLL2 Digital Lock Detect
1
0
1
Reserved
1
0
1
0
Reserved
1
0
1
Reserved
1
0
Reserved
1
0
1
Reserved
1
0
Reserved
1
Reserved
Copyright 2008–2011, Texas Instruments Incorporated
41
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