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參數(shù)資料
| 型號： | LMK04000BEVALXO |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 43/65頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL PREC CLOCK PLL XO |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PowerWise® |
| 主要目的： | 計時，時鐘調(diào)節(jié)器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LMK04000 |
| 主要屬性： | 122.88 MHz 晶體 |
| 次要屬性： | 集成式 PLL 和 VCO |
| 已供物品： | 板，線纜 |
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2
CL = 6 + 6 +
4
= 14 pF
2
CSTRAY
CL = CTUNE + CIN +
C
Po
u
t1
LMK040xx
OSCin
OSCin*
Copt
PLL1 Loop Filter
XTAL
CC1 = 2.2 nF
CC2 = 2.2 nF
R1 = 4.7k
R3 = 10k
Copt
1 nF
R2 = 4.7k
SMV1249-074LF
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Figure 16. Reference Design Circuit for Crystal Oscillator Option
Optional Crystal Oscillator Implementation (OSCin/OSCin*)
The LMK04000 family features supporting circuitry for a discretely implemented oscillator driving the OSCin port
pins. Figure 16 illustrates a reference design circuit for a crystal oscillator:
This circuit topology represents a parallel resonant mode oscillator design. When selecting a crystal for parallel
resonance, the total load capacitance, CL, must be specified. The load capacitance is the sum of the tuning
capacitance (CTUNE), the capacitance seen looking into the OSCin port (CIN), and stray capacitance due to PCB
parasitics (CSTRAY), and is given by:
CTUNE is provided by the varactor diode shown in Figure 16, Skyworks model SMV1249-074. A dual diode
package with common cathode and provides the variable capacitance for tuning. The single diode capacitance
ranges from approximately 31 pF at 0.3 V to 3.4 pF at 3 V. The capacitance range of the dual package (anode to
anode) is approximately 15.5 pF at 3 V to 1.7 pF at 0.3 V. The desired value of VTUNE applied to the diode should
be VCC/2, or 1.65 V for VCC = 3.3 V. The typical performance curve from the data sheet for the SMV1249-074
indicates that the capacitance at this voltage is approximately 6 pF (12 pF/2).
The nominal input capacitance (CIN) of the LMK04000 family OSCin pins is 6 pF. The stray capacitance (CSTRAY)
of the PCB should be minimized by arranging the oscillator circuit layout to achieve trace lengths as short as
possible and as narrow as possible trace width (50
Ω characteristic impedance is not required). As an example,
assume that CSTRAY is 4 pF. The total load capacitance is nominally:
Consequently the load capacitance specification for the crystal in this case should be nominally 14 pF.
48
Copyright 2008–2011, Texas Instruments Incorporated
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