參數(shù)資料
型號(hào): LMK04000BEVALXO
廠商: National Semiconductor
文件頁(yè)數(shù): 34/65頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL PREC CLOCK PLL XO
標(biāo)準(zhǔn)包裝: 1
系列: PowerWise®
主要目的: 計(jì)時(shí),時(shí)鐘調(diào)節(jié)器
嵌入式:
已用 IC / 零件: LMK04000
主要屬性: 122.88 MHz 晶體
次要屬性: 集成式 PLL 和 VCO
已供物品: 板,線纜
47
48
46
45
44
43
42
41
40
39
38
37
11
12
10
9
8
7
6
5
4
3
2
1
14
13
15
16
17
18
19
20
21
22
23
24
26
25
27
28
29
30
31
32
33
34
35
36
GND
Fout
Vcc1
Vcc2
Vcc3
D
L
D_
BYP
Vcc5
Vcc6
CLKin1*
Vcc8
Vcc9
Vcc10
Vcc
1
Vcc
1
2
Vcc
1
3
Vcc
1
4
CLKuWire
DATAuWire
LEuWire
NC
LDObyp1
LDObyp2
GOE
LD
C
L
Ko
u
t0
C
L
Ko
u
t0
*
G
N
D
Vcc4
C
L
Ki
n
0
C
L
Ki
n
0
*
C
Po
u
t1
Vcc7
CLKin1
SYNC*
OSCin
OSCin*
CPout2
CLKin0_LOS
CLKin1_LOS
Bias
C
L
Ko
u
t1
C
L
Ko
u
t1
*
C
L
Ko
u
t2
C
L
Ko
u
t2
*
C
L
Ko
u
t3
C
L
Ko
u
t3
*
C
L
Ko
u
t4
C
L
Ko
u
t4
*
DAP
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Connection Diagram
Figure 1. 48-Pin WQFN Package
Top View
PIN DESCRIPTIONS
Pin Number
Name(s)
I/O
Type
Description
1
GND
Ground (For Fout Buffer)
2
Fout
O
ANLG
VCO Frequency Output Port
3
VCC1
PWR
Power Supply for VCO Output Buffer
4
CLKuWire
I
CMOS
Microwire Clock Input
5
DATAuWire
I
CMOS
Microwire Data Input
6
LEuWire
I
CMOS
Microwire Latch Enable Input
7
NC
No Connection
8
VCC2
PWR
Power Supply for VCO
9
LDObyp1
ANLG
LDO Bypass, bypassed to ground with a 10 F capacitor
10
LDObyp2
ANLG
LDO Bypass, bypassed to ground with a 0.1 F
capacitor
11
GOE
I
CMOS
Global Output Enable
12
LD
O
CMOS
Lock Detect and PLL multiplexer Output
13
VCC3
PWR
Power Supply for CLKout0
14
CLKout0
O
LVDS/LVPECL
Clock Channel 0 Output
15
CLKout0*
O
LVDS/LVPECL
Clock Channel 0* Output
16
DLD_BYP
ANLG
DLD Bypass, bypassed to ground with a 0.47 F
capacitor
17
GND
Ground (Digital)
18
VCC4
PWR
Power Supply for Digital
4
Copyright 2008–2011, Texas Instruments Incorporated
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