參數(shù)資料
型號(hào)： MC68HC05C0P
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 4 MHz, MICROCONTROLLER, PDIP40
封裝： DIP-40
文件頁數(shù)： 56/96頁
文件大?。?/td> 357K
代理商： MC68HC05C0P
MOTOROLA
Page vii
MC68HC05C0 Specification Rev. 1.2
LIST OF FIGURES
Figure 1-1
Block Diagram of the MC68HC05C0 .................................................... 2
Figure 1-2
40-Pin DIP Pinout of the MC68HC05C0 ............................................... 5
Figure 1-3
42-Pin SDIP Pinout of the MC68HC05C0............................................. 6
Figure 1-4
44-Pin PLCC Pinout of the MC68HC05C0 ........................................... 7
Figure 2-1
The 64K Memory Map of the MC68HC05C0 ........................................ 9
Figure 2-2
I/O Registers for the MC68HC05C0 .................................................. 10
Figure 3-1
Programming Model............................................................................ 13
Figure 3-2
Stacking Order .................................................................................... 13
Figure 4-1
Interrupt Flowchart .............................................................................. 22
Figure 5-1
Power-On Reset and RESET ............................................................. 23
Figure 6-1
Stop Recovery Timing Diagram .......................................................... 26
Figure 6-2
STOP/WAIT Flowchart........................................................................ 27
Figure 7-1
Port D Interrupt Option........................................................................ 30
Figure 7-2
Port I/O Circuitry ................................................................................. 31
Figure 8-1
Configuration Register ........................................................................ 34
Figure 8-2
External Interrupt Control/Status Register .......................................... 36
Figure 9-1
Muxed Mode Timing ........................................................................... 39
Figure 9-2
Non-Muxed Mode Timing.................................................................... 40
Figure 9-3
Muxed Mode Clock Stretched Read Cycle ......................................... 42
Figure 9-4
Muxed Mode Clock Stretched Write Cycle ......................................... 42
Figure 9-5
Non-Muxed Mode Clock Stretched Read Cycle ................................. 43
Figure 9-6
Non-Muxed Mode Clock Stretched Read Cycle ................................. 43
Figure 10-1
Multi-Function Timer Block Diagram.................................................. 47
Figure 10-2
Timer Control and Status Register (TCSR) ....................................... 48
Figure 10-3
Timer Counter Register...................................................................... 50
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