參數(shù)資料
型號: MC68HC05C0P
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 4 MHz, MICROCONTROLLER, PDIP40
封裝: DIP-40
文件頁數(shù): 93/96頁
文件大?。?/td> 357K
代理商: MC68HC05C0P
Section 13: Electricals
MOTOROLA
Page 85
MC68HC05C0 Specification Rev. 1.2
Chapter 6: Timer
13.3
DC ELECTRICAL CHARACTERISTICS
(V
DD
= 5.0 V
dc ±
10%, V
SS
= 0 V
dc
, T
A
= 0
°C to +70°C, unless otherwise noted)
NOTES:
1.
All values shown reflect average measurements at midpoint of voltage range at 25
°C.
2. Wait I
DD
: Only timer system active.
3. Run (Operating) I
DD
, Wait I
DD
: Measured using external square wave clock source (f
osc
= 4.2 MHz), all inputs 0.2 V from rail; no dc loads, less
than 50 pF on all outputs, C
L
= 20 pF on OSC2.
4. Wait, Stop I
DD
: All ports configured as inputs, V
IL
= 0.2 V, V
IH
= V
DD
-0.2 V.
5. Stop I
DD
measured with OSC1 = V
SS
.
6. Wait I
DD
is affected linearly by the OSC2 capacitance.
I
Load
= -10.0
A
Output voltage
I
Load
= 10.0
A
Unit
Max
Typ
Min
Symbol
Characteristic(1)
V
0.1
V
OL
V
DD
-0.1
V
OH
Output High Voltage
Output Low Voltage
(I
Load
= -0.8 mA) PB0-5, PC0-3, PD0-7,RD,WR,AS/CS2
V
V
DD
-0.8
V
OH
A15,A14-A8,AD7-0,LIR/MODE
(I
Load
= -5.0 mA) PB0
V
V
DD
-0.8
V
OH
(I
Load
= 20 mA) PB0
0.4
(I
Load
= 1.6 mA) PB0-5, PC0-3, PD0-7,RD,WR,AS/CS2
V
V
OL
A15,A14-A8,AD7-0,LIR/MODE,RESET
V
V
OL
0.6
Input High Voltage
V
DD
V
IH
PB0-5,PC0-3, PD0-7, IRQ,RESET,OSC1,
AD7-0,LIR/MODE
V
0.7
×V
DD
Supply Current (see Notes)
TBD
I
DD
mA
Run (3)
TBD
I
DD
mA
Wait (2) (4) (6)
Stop with LVI disabled/enabled (5)
TBD/TBD
A
25
°C
TBD/TBD
I
DD
A
0
°C to +70°C
I/O Ports Hi-Z Leakage Current
10
I
OZ
PB0-5, PC0-3, PD0-7,AD0-7
A
Input Current
1
I
in
RESET, IRQ, OSC1,PB0-5,PC0-3,PD0-7,AD0-7
A
Capacitance
12
C
out
Ports (as Input or Output)
pF
RESET, IRQ, OSC1,PB0-5,PC0-3,PD0-7,AD0-7
C
in
—8
—pF
Input Low Voltage
0.2
×V
DD
V
IL
PB0-5,PC0-3, PD0-7, IRQ,RESET,OSC1,
AD7-0,LIR/MODE
V
SS
I
DD
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