參數(shù)資料
型號: MC68HC05C0P
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 4 MHz, MICROCONTROLLER, PDIP40
封裝: DIP-40
文件頁數(shù): 77/96頁
文件大?。?/td> 357K
代理商: MC68HC05C0P
MOTOROLA
Section 12: Serial Communications Interface
Page 70
MC68HC05C0 Specification Rev. 1.2
T8 - Transmit Data Bit 8
This bit is the ninth data bit to be transmitted when the SCI system is configured for nine
data bit operation (M = 1). When the eight low order bits (bits 0 – 7) of a transmit character
are transferred from the SCI data register to the serial transmit shift register, this bit (bit 8)
is transferred to the ninth bit position of the shifter. This bit is read/writable anytime, but only
has an effect when M=1.
SCKM - Serial Clock Mode
When set, this bit allows Port B bit 4 to become the SCK pin, provided the transmitter is
enabled (TE is set in SCCR2) or a transmission is in progress when TE is written to a zero.
If this bit is clear, or if this bit is set but the transmitter is disabled and no transmission is in
progress, control of this port will be returned to the Port B bit 4 data direction register.
1 = Port B bit 4 = SCK (if TE or transmission in progress)
0 = Port B bit 4 = General Purpose I/O
M - Mode (SCI character word length)
The M bit controls the character length for both the transmitter and receiver at the same
time. The 9th data bit is most commonly used as an extra stop bit or in conjunction with the
“address mark” wake-up method. It can also be used as a parity bit.
1= one start bit, nine data bits, one stop bit
0= one start bit, eight data bits, one stop bit
NOTE:
The Mode bit should not be changed in the middle of a transmission or
reception.
WAKE - Wake-Up Select
This bit allows the user to select the method for receiver “wake-up”. If the WAKE bit is clear,
an idle line condition will “wake up” the receiver. If the WAKE bit is set, the system
acknowledges an address bit (most significant bit).
The address bit “wake-up” is dependent on both the WAKE bit and the M bit as shown in
NOTE:
The receiver will not acknowledge any wake-up feature unless the RWU
bit in control register 2 (SCCR2) is set.
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