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參數(shù)資料
| 型號(hào)： | MC68HC05G3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 128/128頁(yè) |
| 文件大?。?/td> | 290K |
| 代理商： | MC68HC05G3 |
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Page 89
Section 8: TIMER SYSTEM
MOTOROLA
MC68HC05G3 (705G4) Specification Rev. 1.1
8.4.2
TIMER INPUT 2 (EVI)
The event input (EVI) is used as external clock input of the timer 2.
Figure 8-7: EVI Block Diagram
Since the external clock may be asynchronous to the internal clock, this input has a
synchronizer which samples the external clock by the internal system clock. (The input
transition synchronizes to the falling edge of PHI2. Therefore, the minimum pulse width for
EVI should be larger than one system clock.)
The IM2 and IL2 bits in the TCR2 determine how this synchronized external clock is used.
IM2 bit selects either the event mode or gated mode, and IL2 bit selects whether the level
or edge is activated.
In the event mode (IM2 = 0), the external clock drives the timer 2 counter directly and the
active edge at the EVI pin is selected by the IL2 bit. When the active edge is detected, the
TI2F bit in the TSR2 is set.
In the gated mode (IM2 = 1), the EVI input is gated by CLK2 from the prescaler and the
gate output drives the timer 2 counter. IL2 bit selects the active level of the external input.
When the transition from active level to inactive level is detected, the TI2F bit is set.
Changing the IM2 bit may cause an illegal count up of TCNT2. Therefore, the software must
preset the TCNT2 after initializing IM2. Since the EVI pin is shared with the PC4 I/O pin,
DDRC4 always should be cleared whenever EVI is used. EVI cannot be used if DDRC4 is
high.
PC4
EVI
SYNC
ACTIVE
EDGE/LEVEL
SELECTOR
GATE/EVENT
MODE
CONTROL
PC4
PHI2
IL2
IM2
CLK2
to TI2F
EXCLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC705J5ACJP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP16 |
| MC68HC705J5ACP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC05J5AJDW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO16 |
| MC68HRC705J5ACDW | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| MC68HRC05J5ADW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MC68HC05J1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05J1A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
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