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參數(shù)資料
| 型號： | MC68HC05G3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 89/128頁 |
| 文件大小： | 290K |
| 代理商： | MC68HC05G3 |
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Page 53
Section 6: INPUT/OUTPUT PORTS
MOTOROLA
MC68HC05G3 (705G4) Specification Rev. 1.1
SECTION 6
INPUT/OUTPUT PORTS
The MC68HC05G3 (705G4) has eight 8-bit ports and one 4-bit port. Most of these 68 input/
output (I/O) pins serve multiple purposes depending on the configuration of the MCU
system. The configuration in turn is controlled by hardware mode selection as well as
several internal control registers.
Figure 6-1: Port I/O Circuitry for One Bit
6.1
PORT A
Port A is an 8-bit bidirectional general-purpose port. The data direction of a port A pin is
determined by its corresponding DDRA bit.
When a bit is programmed as an output by the corresponding DDRA bit, a data in the
PORTA data register becomes an output data to the pin and it is returned for CPU read of
PORTA register.
Open drain or CMOS outputs are selected by AWOMH and AWOML bits in the WOM1
register. If the AWOMH bit is set, the P-channel drivers of output buffers of bit 7 through bit
4 are disabled (open drain). If the AWOML bit is set, the P-channel drivers of the output
buffers of bit 3 through bit 0 are disabled (open drain).
When a bit is programmed as input by the corresponding DDRA bit, the pin level is read by
the CPU.
Port A has pullup resistors as an option. When the RAH or RAL bit in the RCR1 is set, the
pullup resistors are attached to the upper four bits or lower four bits of port A pins. (The
typical resistor values are to be 50 K
@ 3 V.) When a pin outputs a low level, the pullup
resistor is disconnected regardless of the state of the RAH or RAL bits.
Data Direction
Register Bit
Latched Output
Data Bit
I/O
Pin
Input
Reg
Bit
Input
I/O
Output
Internal
HC05
Connections
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