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參數(shù)資料
| 型號(hào)： | MC68HC05G3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 86/128頁(yè) |
| 文件大?。?/td> | 290K |
| 代理商： | MC68HC05G3 |
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Page 50
MOTOROLA
Section 5: RESET/ INTERRUPT STRUCTURE
MC68HC05G3 (705G4) Specification Rev. 1.1
5.2.3
KEY WAKE-UP INTERRUPT TIMING
A KWI interrupt request is internally latched and synchronized into the KWI circuit
immediately following the falling edge of the KWI source. If KWIE is set, following a delay
of one CPU cycle, it is latched into the CPU. If KWIE is not set, the KWI interrupt will be
pending until KWIE is set and then latched into the CPU one cycle later. If the interrupt
mask bit (I bit) is cleared, the KWI interrupt service routine, specified by the contents of
$3FF8:9, will be executed immediately after being latched by the CPU.
NOTE: If the KWIE is set while a KWI is pending, this interrupt is
serviced one instruction cycle following the register update. It is thus
advised to code as follows:
1) BSET KWIE,INTCR
turn on KWI interrupt
2) NOP
dummy instruction cycle
3) ( next instruction intended )
If a KWI interrupt is pending when the above code sequence is executed, instruction 1) will
enable the KWI interrupt, the KWI interrupt will be latched into the CPU during instruction
2) and the KWI interrupt service routine will be executed immediately before instruction 3).
5.2.4
TIMER 1 INTERRUPT
Three timer 1 interrupts (TOI, ICI, and OC1I) share the same interrupt vector at $FFF6 and
$FFF7. For more information, refer to 8.1 TIMER 1.
5.2.5
TIMER 2 INTERRUPT
Two timer 2 interrupts (TI2I and OC2I) share the same interrupt vector at $FFF4 and
$FFF5. For more information, see 8.2 TIMER 2.
5.2.6
SPI1 AND SPI2 INTERRUPTS
Two SPI (SPI1 and SPI2) transfer complete interrupts share the same interrupt vector at
$FFF2 and $FFF3. For more information, see SECTION 7 SERIAL PERIPHERAL
INTERFACE (SPI).
5.2.7
TB INTERRUPT
The time base interrupt uses the vector at $FFF0 and $FFF1. For more information, see
1.4.1.6 TIME BASE.
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| MC68HC705J5ACJP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP16 |
| MC68HC705J5ACP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC05J5AJDW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO16 |
| MC68HRC705J5ACDW | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC68HC05J1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05J1A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
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