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參數(shù)資料
| 型號(hào)： | MC68HC05G3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 39/128頁(yè) |
| 文件大?。?/td> | 290K |
| 代理商： | MC68HC05G3 |
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Page 8
MOTOROLA
Section 1: INTRODUCTION
MC68HC05G3 (705G4) Specification Rev. 1.1
XOSC WITH FOSCE=0 AND STOP
If XOSC is the system clock and FOSCE is cleared, further power reduction can be
achieved by executing the STOP instruction. In this case, OSC is stopped, the 7-bit divider
plus the 6-bit POD counter are preset to $0078 (since FOSCE=0) and execution is halted.
Exiting STOP with external IRQ does not re-start the OSC; however, execution begins
immediately using XOSC. OSC may be re-started by setting FOSCE, and when the POD
counter overflows, FTUP be will set signaling that OSC is stable and can be used as the
system clock. The stabilization time will be 8072 counts.
1.4.1.3
OSC CLOCK DIVIDER AND POD COUNTER
The OSC clock is divided by a 7-bit counter which is used for the system clock, time base,
and POD counter. Clocks divided by 2, 4, and 64 are available for the system clock
selections and a clock divided by 128 is provided for the time base and POD counter.
The POD counter is a 6 bit-clock counter that is driven by the OSC divided by 128. The
overflow of this counter is used for setting FTUP bit, release of power-on delay (POD), and
resuming operation from stop mode.
The 7-bit divider plus the 6-bit POD counter are initialized to $0078 by the following
conditions.
Power-on detection
When FOSCE bit is cleared
1.4.1.4
SYSTEM CLOCK CONTROL
The system clock is provided for all internal modules except time base.
Both OSC and XOSC are available as the system clock source. The divide ratio is selected
by the SYS1 and SYS0 bits in the MISC register.
By default OSC divided by two is selected on reset.
Table 1-1: System Clock Frequency
SYS1
SYS0
DIVIDE RATIO
FREQUENCY (HZ)
OSC=
4.0M
OSC=
4.1943M
XOSC=
32.768K
0
1
0
1
0
1
OSC DIVIDED BY 2
OSC DIVIDED BY 4
OSC DIVIDED BY 64
XOSC DIVIDED BY 2
2.0M
1.0M
62.5K
----
2.0972M
1.0486M
65.536K
----
16.384K
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC705J5ACJP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP16 |
| MC68HC705J5ACP | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC05J5AJDW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO16 |
| MC68HRC705J5ACDW | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| MC68HRC05J5ADW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05J1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05J1A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
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