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參數(shù)資料
| 型號(hào)： | MC92610VF |
| 廠(chǎng)商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324 |
| 封裝： | 19 X 19 MM, 1.76 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034AAG-1, MAPBGA-324 |
| 文件頁(yè)數(shù)： | 48/104頁(yè) |
| 文件大?。?/td> | 1595K |
| 代理商： | MC92610VF |
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3-18
MC92610 SERDES User’s Manual
MOTOROLA
Receiver Functional Description
interface A, the second on receiver interface B. It is recommended that Idles be transmitted
simultaneously as A and B pairs. If Idles are transmitted on only one input byte, they must
be on B to maintain the proper byte order in the 16 bit output. The link status codes on
receiver interface A and B represent the status of the current character. Both sets of status
signals are active and must be observed.
The received data is timed relative to the rising edge of the receiver interface clock,
RECV_x_CLK. The receive interface may also be operated in DDR mode by asserting
DDRE high.
Link Multiplexer mode is enabled by asserting LME high.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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