參數(shù)資料
型號： MC92610VF
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324
封裝： 19 X 19 MM, 1.76 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034AAG-1, MAPBGA-324
文件頁數(shù)： 85/104頁
文件大?。?/td> 1595K
代理商： MC92610VF
MOTOROLA
Chapter 7. Package Description
7-7
MC92610 Chip Pinout Listing
XMIT_B_K
Transmitter B, Special Character (Data bit 8
for TBI mode)
V3
Input
HSTL
XMIT_B_IDLE
Transmitter B, Idle Enable Bar, (Data bit 9 for
TBI mode)
U3
Input
HSTL
XMIT_B_CLK
Transmitter B, Transmit Interface Clock
V4
Input
HSTL
RECV_B_0
Receiver B, Data bit 0
P1
Output
HSTL
RECV_B_1
Receiver B, Data bit 1
L4
Output
HSTL
RECV_B_2
Receiver B, Data bit 2
N3
Output
HSTL
RECV_B_3
Receiver B, Data bit 3
N1
Output
HSTL
RECV_B_4
Receiver B, Data bit 4
M3
Output
HSTL
RECV_B_5
Receiver B, Data bit 5
M2
Output
HSTL
RECV_B_6
Receiver B, Data bit 6
M1
Output
HSTL
RECV_B_7
Receiver B, Data bit 7
L3
Output
HSTL
RECV_B_K
Receiver B, Special Character (Data bit 8 for
TBI mode)
L2
Output
HSTL
RECV_B_9
Receiver B, Data bit 9 for TBI mode
K2
Output
HSTL
RECV_B_IDLE
Receiver B, Idle Detect
K4
Output
HSTL
RECV_B_ERR
Receiver B, Error Detect
J1
Output
HSTL
RECV_B_CLK
Receiver B, Receive Data Clock
K3
Output
HSTL
XCVR_B_RSEL
Transceiver B, Redundant Link Select
U13
Input
CMOS
XCVR_B_DISABLE
Transceiver B, Disable
C14
Input
CMOS
RLINK_B0_P
Receiver B, Primary Positive Link Input
L17
Input
Link
RLINK_B0_N
Receiver B, Primary Negative Link Input
M17
Input
Link
RLINK_B1_P
Receiver B, Redundant Positive Link Input
L15
Input
Link
RLINK_B1_N
Receiver B, Redundant Negative Link Input
M15
Input
Link
XLINK_B0_P
Transmitter B, Primary Positive Link Out
N18
Output
Link
XLINK_B0_N
Transmitter B, Primary Negative Link Out
P18
Output
Link
XLINK_B1_P
Transmitter B, Redundant Positive Link Out
N16
Output
Link
XLINK_B1_N
Transmitter B, Redundant Negative Link Out
P16
Output
Link
XMIT_C_0
Transmitter C, Data bit 0
D9
Input
HSTL
XMIT_C_1
Transmitter C, Data bit 1
E8
Input
HSTL
XMIT_C_2
Transmitter C, Data bit 2
B6
Input
HSTL
XMIT_C_3
Transmitter C, Data bit 3
C7
Input
HSTL
XMIT_C_4
Transmitter C, Data bit 4
D7
Input
HSTL
Table 7-2. 324 MAPBGA Signal to Ball Mapping (continued)
Signal Name
Description
Ball Number
(324 MAPBGA)
Direction
I/O Type
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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..
.
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