參數(shù)資料
型號(hào): MC92610VF
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324
封裝: 19 X 19 MM, 1.76 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034AAG-1, MAPBGA-324
文件頁(yè)數(shù): 73/104頁(yè)
文件大?。?/td> 1595K
代理商: MC92610VF
6-8
MC92610 SERDES User’s Manual
MOTOROLA
AC Electrical Characteristics
6.3.4
Receiver Recovered Clock Timing
The following Figure 6-7 and Table 6-10 describe the recovered clock timing.
Table 6-9. Reference Clock Specification
Symbol
Characteristic
Min
Max
Unit
Tr
1
Measured between 10-90 percent points.
REF_CLK_P/N rise time
-
2.0
ns
Tf
REF_CLK_P/N fall time
-
2.0
ns
frange
REF_CLK_P/N frequency range
95 2
2 Full speed operation (HSE = low).
156.25
MHz
47.5 3
3 Half speed operation, not link multiplexer mode (HSE = high, LME = low) or half speed operation, link
multiplexer mode SDR (LME = high, DDRE = low).
78.125
MHz
23.75 4
4 Half speed operation (HSE = high), link multiplexer mode DDR (LME = high, DDRE = high).
39.0625
MHz
TD
REF_CLK_P/N duty cycle
40
60
Percent
Tdiff
REF_CLK_P to REF_CLK_N differential skew
-
1.0
ns
ftol
REF_CLK_P/N frequency tolerance
-100
100
ppm
Tj
5
5 Total peak-to-peak jitter.
REF_CLK_P/N input jitter
-
80
ps
Tlock
6
6 Lock time after compliant REF_CLK_P/N signal applied.
PLL lock time
-
20,480 +
25
s
bit-times
Figure 6-7. Recovered Clock Timing Diagram
Table 6-10. Recovered Clock Specification
Symbol
Characteristic
Min
Max
Unit
Trck
RECV_x_CLK
6.20 1, 2
-ns
12.44 3
-ns
Tr
4
RECV_x_RCLK rise time
-
1.0
ns
Tf
RECV_x_CLK fall time
-
1.0
ns
RECV_x_CLK
Tj
Tf, Tr
Trck
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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