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參數(shù)資料
| 型號： | MPC7450RX667LX |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 667 MHz, RISC PROCESSOR, CBGA483 |
| 封裝： | 29 X 29 MM, 3.22 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-483 |
| 文件頁數(shù)： | 48/60頁 |
| 文件大小： | 1296K |
| 代理商： | MPC7450RX667LX |
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52
MPC7450 RISC Microprocessor Hardware Specifications
System Design Information
scan chain is initialized during power-on if a JTAG interface cable is not attached; if it is, it is responsible
for driving TRST when needed.
Figure 25. Suggested TRST Connection
The COP header shown in Figure 25 adds many benefits—breakpoints, watchpoints, register and memory
examination/modification, and other standard debugger features are possible through this interface—and
can be as inexpensive as an unpopulated footprint for a header to be added when needed.
The COP interface has a standard header for connection to the target system, based on the 0.025"
square-post, 0.100" centered header assembly (often called a Berg header). The connector typically has
pin 14 removed as a connector key, see Figure 26.
Figure 26. COP Connector Diagram
There is no standardized way to number the COP header shown in Figure 26; consequently, many different
pin numbers have been observed from emulator vendors. Some are numbered top-to-bottom then
left-to-right, while others use left-to-right then top-to-bottom, while still others number the pins counter
clockwise from pin 1 (as with an IC). Regardless of the numbering, the signal placement recommended in
Figure 26 is common to all known emulators.
The QACK signal shown in Table 21 is usually connected to the PCI bridge chip in a system and is an input
to the MPC7450 informing it that it can go into the quiescent state. Under normal operation this occurs
during a low-power mode selection. In order for COP to work the MPC7450 must see this signal asserted
MPC7450
HRESET
TRST
From Target
Board
Sources
COP Header
2 k
QACK
2 k
3
CKSTP_
O
U
T
13
9
5
1
6
10
2
TOP VIEW
15
11
7
16
12
8
4
KEY
No Pin
HRESET
SRESET
TM
S
RUN/ST
O
P
TCK
TDI
TDO
Gro
und
TR
S
T
V
D
D_
SENSE
Pins 10, 12, and 14 are no-connects.
Pin 14 is not physically present.
QACK
CHKSTP_
IN
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