MC68HC(7)05H12
—
Rev. 1.0
MOTOROLA
General Release Specification
Index
190
Index
control register 1 (SCCR1)
136
control register 2 (SCCR2)
137
,
138
data format
130
data register (SCDAT)
135
interrupt
65
receiver wake-up
130
status register (SCSR)
138
,
139
SCK
22
,
117
SCP1, SCPO bits in BAUD
141
SCR2, SCR1, SCRO bits in BAUD
141
serial communcations interface
see SCI
serial peripheral interface
see SPI
short circuit detection
88
SIGN3–0 bits in PWMCTL
164
slave mode
120
slow mode
78
software interrupt (SWI)
63
SPE bit in SPCR
121
SPI
block diagram
119
control register (SPCR)
121
,
122
data I/O register (SPDAT)
124
interrupt
65
master and slave
120
MISO
116
MOSI
117
serial clock (SCK)
117
status register (SPSR)
123
SPIE bit in SPCR
121
SPIF bit in SPSR
123
SPP bit in BAUD
140
SPR1, SPR0 bits in SPCR
122
stack pointer
39
start bit
132
system control register (SYSCR)
34
ECLK — internal system clock available
34
IRQ — IRQ sensitivity
34
SC — system clock option
34
T
T8 bit in SCCR1
136
TC bit in SCSR
139
TCAP0–3
22
TCAP1 bit in TSR
113
TCAP2 bit in TSR
113
TCIE bit in SCCR2
137
TCLR bit in BAUD
140
TCMP0–1
22
TDO
22
TDRE bit in SCSR
139
TE bit in SCCR2
137
thermal characteristics
175
TIE bit in SCCR2
137
timer control register 1 (TCR1)
110
CO1E — timer compare 1 output enable
111
ICI1E — input capture 1 interrupt enable
111
ICI2E — input capture 2 interrupt enable
111
IEDG1 — input edge
111
IEDG2 — input edge
111
OCI1E — output compare 1 interrupt enable
111
OLVL1 — output level 1
111
TOIE — timer overflow interrupt enable
111
timer control register 2 (TCR2)
112
CO2E — timer compare 2 output enable
112
OCI2E — output compare 2 interrupt enable
112
OLVL2 — output level 2
112
timer status register (TSR)
113
IC1F — input capture 1 flag
113
IC1F — output compare 1 flag
113
IC2F — input capture 2 flag
113
IC2F — output compare 2 flag
114
TCAP1 — timer capture 1
113