
PSB 7230
Firmware Features
Semiconductor Group
162
Data Sheet 1998-07-01
The SR request will be recognized by the JADE AN, but not immediately be serviced. It
is stored in an internal interrupt buffer and the VocFin is handled first as the higher
priority interrupt. So, the host must not wait for the SR request to be serviced, but has to
be able to recognize a VocFin interrupt from the JADE AN after an SR request. The
VocFin interrupt then is serviced as usual and only after the corresponding handshake
mechanism is finished, the SR request is serviced by the JADE AN.
6.2.3.3
Uncompressed Data: IOM IF, Compressed Data: Serial Audio
Interface (SAI)
This is the default mode of the JADE AN (ISEL(1-0) = 10). The complete setup of the
interfaces, timeslots and so on is done by the on-chip firmware after Reset, so that a
standalone application with a video processor using the IOM-SAI interface combination
can be realized without the need of an additional host.
Figure 54
The on-chip firmware uses the data controller for the transfer of the compressed audio
data over the serial audio interface. During the initialization phase after a reset, the
internal firmware programs the configuration/control registers (see
Section 5.3
) and the
data controller (see
Section 5.4
). This results in a serial clock rate of 1.23 MHz
continously generated by the JADE AN, a 16 bit time-slot length and MSB sent/received
first. The frame sync signals RFS and TFS are generated by the JADE AN
non-continously, i.e. during one frame only the exact number of frame syncs needed for
the transfer of the current packet of data is generated in one burst.
The IOM Interface is in TE mode (double DCL clock) and IC1/2 channels are selected
for the 16 bit linear data transfer between the JADE AN and the analog front end (AFE).
The DD line is output of the JADE AN, DU is input to the JADE AN.
This configuration may be changed by the host by just overwriting the corresponding
registers.