參數(shù)資料
型號(hào): PSB7230
廠商: SIEMENS A G
元件分類: 編解碼器
英文描述: Joint Audio Decoder-Encoder for Analog Videophone JADE AN
中文描述: A/MU-LAW, PCM CODEC, PQFP100
文件頁(yè)數(shù): 71/179頁(yè)
文件大?。?/td> 2422K
代理商: PSB7230
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)當(dāng)前第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)
PSB 7230
Functional Blocks
Semiconductor Group
71
Data Sheet 1998-07-01
Each data byte is transmitted at least twice (only twice if the receiver is fast enough so
that the transmitter works at maximum speed), namely once when MX is 1, and once
when MX is 0 in the next frame. The only exception is the first byte, which is transmitted
in three consecutive frames (where MX = 1, 0, 0, respectively).
In order for the transmitter to recognize that the receiver has correctly acknowledged the
last byte, the interrupt status MEA is set after the received MR bit is received at 1 in two
consecutive frames (interrupt status different from MAB). The condition for generating
an MEA interrupt status is the
recognition of a MR = 0, 1, 1 sequence when MXC = 0
.
Figure 31
Figure 31
shows the general case,
Figure 32
the maximum speed case.
Software Handling of Monitor Channel Reception
The receiver of the Monitor channel is controlled via the MRE bit. As long as the MRE bit
is zero, no evaluation of the received MX bit is done. If the MRE bit is set to 1, then the
Monitor channel hardware waits for a start of a Monitor packet. When the start of a
packet is recognized with a Monitor byte matching monitor receive address,
acknowledgement can be enabled by the software by setting the MR Control bit MRC
相關(guān)PDF資料
PDF描述
PSB7238 Joint Audio Decoder-Encoder - Multimode
PSB7280 Joint Audio Decoder-Encoder
PSB8510-1P Programmable Dialing Circuit
PSB8510-1T Programmable Dialing Circuit
PSB8510-6P Programmable Dialing Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSB7238 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Joint Audio Decoder-Encoder - Multimode
PSB7238FV2.1JADEMM 制造商:Rochester Electronics LLC 功能描述:- Bulk
PSB7280 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Joint Audio Decoder-Encoder
PSB7280FV3.1 制造商:Rochester Electronics LLC 功能描述:- Bulk
PSB7280FV3.1D 制造商:Rochester Electronics LLC 功能描述:- Bulk