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參數(shù)資料
| 型號： | PSB7230 |
| 廠商： | SIEMENS A G |
| 元件分類： | 編解碼器 |
| 英文描述： | Joint Audio Decoder-Encoder for Analog Videophone JADE AN |
| 中文描述： | A/MU-LAW, PCM CODEC, PQFP100 |
| 文件頁數(shù)： | 58/179頁 |
| 文件大小： | 2422K |
| 代理商： | PSB7230 |
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PSB 7230
Functional Blocks
Semiconductor Group
58
Data Sheet 1998-07-01
Transmitter in LMOD(1:0) = 01, 10, 11
Similarly, in the transmit direction, after 1, 2 or 4 bytes (programmable) are shifted out of
the shift register, the contents of the HXW1/2 write register accessible from DSP
(if HHX1/2 = 0) or host (if HHX1/2 = 1) are loaded into the transmitter shift register. In the
same cycle 1, 2 or 4 bytes are loaded from the HDLC transmitter output into the HXR1/
2 read register, physically separate for DSP and host. In the next cycle the data from
HXR1/2 is as a default loaded into HXW1/2 and a maskable interrupt status is generated
to the DSP and host. The interrupt status is generated to both DSP and host,
independent of the setting of HAH1/2. If the data in HXR1/2 is to be post-processed, the
HXW1/2 register can be overwritten by the DSP or host before the next 1, 2 or 4 bytes
(programmable) have been shifted out of the shift register.
After reset (XRES), the reset status data of HXR1/2 and HXW1/2 is ignored by the
transmitter, i.e. the contents of HXR1/2 and HXW1/2 are not transmitted to the line, but
only the data from the HDLC transmitter. In the first cycle after the transmitter has been
activated (XAC = 1), the data from the HDLC transmitter is immediately passed to the
HXR1/2 register for post-processing. The line-transmission is not yet started! In the first
cycle after the DSP or host (programmable via HHX1/2) has written the HXW1/2 register
with the post-processed value, this value is passed through the bit-reversal unit into the
shift register and the transmission is started as soon as the next beginning of the
selected time-slot is detected.
The start of the transmission can be in the same frame (w.r.t. the frame sync signal on
the chosen line) as the setting of XAC = 1 and/or the writing to the HXW1/2 register since
the time-slot logic works independently of XAC.
In transparent mode (TMO = 1) the transmission is only started at the beginning of the
time-slot (time-slot aligned). If the first write to HXW1/2 happens during the selected
time-slot, the transmitter waits for the beginning of the time-slot in the next frame.
Transmitter in LMOD(1:0) = 00
The same applies for LMOD = 00, except the post-processing is not available. The data
from the HDLC transmitter is after XAC = 1 directly passed through the bit-reversal unit
into the shift register. In addition, the loading of HXR1/2, HXW1/2 and the generation of
the interrupt is done like in the other LMODs for observation of the data stream by the
DSP or host only. Thus, the LMOD = 00 is identical with LMOD = 01, except
post-processing is not available and the transmitter latency after reset is shortened, see
section below. The transmission is in this case started by the setting of XAC = 1. No write
to HXW1/2 is necessary.
The start of the transmission can be in the same frame (w.r.t. the frame sync signal on
the chosen line) as the setting of XAC = 1 since the time-slot logic works independently
of XAC.
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相關(guān)代理商/技術(shù)參數(shù) |
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| PSB7238 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Joint Audio Decoder-Encoder - Multimode |
| PSB7238FV2.1JADEMM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PSB7280 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Joint Audio Decoder-Encoder |
| PSB7280FV3.1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PSB7280FV3.1D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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