參數(shù)資料
型號(hào)： T8100
英文描述： H.100/H.110 Interface and Time-Slot Interchanger
中文描述： H.100/H.110接口和時(shí)隙交換器
文件頁(yè)數(shù)： 18/92頁(yè)
文件大?。?/td> 1450K
代理商： T8100
16
Lucent Technologies Inc.
Preliminary Data Sheet
August 1998
H.100/H.110 Interface and Time-Slot Interchanger
Ambassador T8100
2 Architecture and Functional Description
(continued)
2.1 Register/Memory Maps
(continued)
2.1.4 Control Register Memory Space
Function of LAR values when AMR = 0x00. All control registers reset to 0x00.
Table 11. Control Register Memory Space
Register
Address
0, 0x00
1, 0x01
2, 0x02
3, 0x03
4, 0x04
5, 0x05
6, 0x06
7, 0x07
8, 0x08
9, 0x09
Register
Mnemonic
CKM
CKN
CKP
CKR
CKS
CK32
CK10
CKMD
CKND
CKRD
(Reserved)
LBS
(Reserved)
CON
(Reserved)
HSL
HSH
(Reserved)
GPR
(Reserved)
FRLA
FRHA
FRLB
FRHB
FRPL
FRPH
(Reserved)
CLKERR1
CLKERR2
SYSERR
CKW
(Reserved)
DIAG1
DIAG2
DIAG3
(Reserved)
Description
Refer to
Section
2.4.6
2.4.6
2.4.6
2.4.6
2.4.6
2.4.6
2.4.6
2.4.6
2.4.6
2.4.6
—
2.2.4
—
Appendix B
—
2.3.5
2.3.5
—
2.5.2
—
2.5.3
2.5.3
2.5.3
2.5.3
2.5.3
2.5.3
—
2.6
2.6
2.6
2.4.6 & 2.6
—
2.8.2
2.8.2
2.8.2
—
Clocks, Main Clock Selections
Clocks, NETREF Selections
Clocks, Programmable Outputs
Clocks, Resource Selection
Clocks, Secondary (Fallback) Selection
Clocks, Locals 3 and 2
Clocks, Locals 1 and 0
Clocks, Main Divider
Clocks, NETREF Divider
Clocks, Resource Divider
10—11, 0x0A—0x0B
12, 0x0C
13, 0x0D
14, 0x0E
15, 0x0F
16, 0x10
17, 0x11
18—23, 0x12—0x17
24, 0x18
25—31, 0x19—0x1F
32, 0x20
33, 0x21
34, 0x22
35, 0x23
36, 0x24
37, 0x25
38—39, 0x26—0x27
40, 0x28
41, 0x29
42, 0x2A
43, 0x2B
44—47, 0x2C—0x2F
48, 0x30
49, 0x31
50, 0x32
51—255, 0x33—0x0FF
—
Local Stream Control
—
Connection Delay Type
—
H-Bus Stream Control, Low Byte
H-Bus Stream Control, High Byte
—
General-purpose I/O Register
—
Frame Group A, Start Address, Low
Frame Group A, High Address and Control
Frame Group B, Start Address, Low
Frame Group B, High Address and Control
Frame Group B, Programmed Output, Low
Frame Group B, Programmed Output, High
—
Clock Error Register, Error Indicator
Clock Error Register, Current Status
System Error Register
Clock Error/Watchdog Masking Register
—
Diagnostics Register 1
Diagnostics Register 2
Diagnostics Register 3
—
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