參數(shù)資料
型號: TSPC603R
英文描述: TSPC603R [Updated 4/02. 44 Pages] 32-bit RISC Microprocessor. 166-300 MHz
中文描述: TSPC603R [更新4 / 02。 44頁] 32位RISC微處理器。 166-300兆赫
文件頁數(shù): 21/44頁
文件大?。?/td> 636K
代理商: TSPC603R
21
TSPC603R
2125A
HIREL
04/02
Notes:
1. TRST is an asynchronous signal. The setup time is for test purposes only.
2. Non-test signal input timing with respect to TCK.
3. Non-test signal output timing with respect to TCK.
Figure 9.
Clock Input Timing Diagram
Figure 10.
TRST Timing Diagram
9
TCK to output high impedance
3
24
ns
3
10
TMS, TDI data setup time
0
ns
11
TMS, TDI data hold time
25
ns
12
TCK to TDO data valid
4
24
ns
13
TCK to TDO high impedance
3
15
ns
Table 14.
JTAG AC Timing Specifications (independent of SYSCLK)
V
DD
= A
V
DD
= 2.5V
±
5%; O
V
DD
= 3.3
±
5%V, GND = 0V, C
L
= 50 pF, -55
°
C
T
C
125
°
C
Num
Characteristic
Min
Max
Unit
Notes
TCK
2
2
1
VM
VM
VM
3
3
VM = Midpoint Voltage (1.4V)
4
5
TRST
TCK
VM
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