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參數(shù)資料
| 型號： | TSPC603R |
| 英文描述： | TSPC603R [Updated 4/02. 44 Pages] 32-bit RISC Microprocessor. 166-300 MHz |
| 中文描述： | TSPC603R [更新4 / 02。 44頁] 32位RISC微處理器。 166-300兆赫 |
| 文件頁數(shù)： | 36/44頁 |
| 文件大?。?/td> | 636K |
| 代理商： | TSPC603R |
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36
TSPC603R
2125A
–
HIREL
–
04/02
A superscalar processor is one that issues multiple independent instructions into multi-
ple pipelines allowing instructions to execute in parallel. The 603r has five independent
execution units, one each for integer instructions, floating-point instructions, branch
instructions, load/store instructions, and system register instructions. The IU and the
FPU each have dedicated register files for maintaining operands (GPRs and FPRs,
respectively), allowing integer calculations and floating-point calculations to occur simul-
taneously without interference.
Because the PowerPC architecture can be applied to such a wide variety of implemen-
tations, instruction timing among various PowerPC processors varies accordingly.
Preparation for Delivery
Packaging
Microcircuits are prepared for delivery in accordance with MIL-PRF-38535.
Certificate of Compliance
ATMEL-Grenoble offers a certificate of compliance with each shipment of parts, affirm-
ing the products are in compliance either with MIL-STD-883 and guaranteeing the
parameters not tested at temperature extremes for the entire temperature range.
Handling
MOS devices must be handled with certain precautions to avoid damage due to accu-
mulation of static charge. Input protection devices have been designed in the chip to
minimize the effect of this static buildup. However, the following handling practices are
recommended:
1.
Devices should be handled on benches with conductive and grounded surfaces
2.
Ground test equipment, tools and operator
3.
Do not handle devices by the leads
4.
Store devices in conductive foam or carriers
5.
Avoid use of plastic, rubber, or silk in MOS areas
6.
Maintain relative humidity above 50 percent if practical
Packages Mechanical
Data
The following sections provide the package parameters and mechanical dimensions for
the CBGA packages.
CBGA Package Parameters
The package parameters are as provided in the following list. The package type is 21
mm, 255-lead ceramic ball grid array (CBGA).
Package outline
21 mm x 21 mm
255
Interconnects
Pitch
1.27 mm
Maximum module height
3.00 mm
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相關(guān)代理商/技術(shù)參數(shù) |
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| TSPC603RCAB/Q8L | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RCAB/Q8LC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RMAB/Q8L | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RMAB/Q8LC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RMG10LC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
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