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參數(shù)資料
| 型號(hào)： | VT6516 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 16/12 PORT 10/1000 ASE T/TX |
| 中文描述： | 16/12港口10/1000日月光噸/德克薩斯州 |
| 文件頁(yè)數(shù)： | 57/73頁(yè) |
| 文件大?。?/td> | 440K |
| 代理商： | VT6516 |
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VIA Technologies, Inc.
Preliminary VT6516 Datarsheet
-
57-
00H
interrupt status register
bit 0: interrupt indication for read/write PHY command
complete
bit 1: interrupt indication for read/write EEPROM command
complete or error
bit 2: interrupt indication for CPU IO port receiving an
incoming packet
bit 3: interrupt indication for CPU IO port finishing the
transmission of an outgoing packet
To clear an interrupt, write 1 to the corresponding IRQSTS bit.
However, write 0 will not cause any change on that interrupt.
SRAM address register
IRQSTS
[3:0] 0
R/
W
01H-
03H
The data object addressed is in unit of 32 bits. The maximum
allowable SRAM size is 1MB. For SRAM direct access, the CPU
has to (1) set SRAMADDR & SRAMDATA, (2) issue read/write
command by SRAMCMD, and (3) check command status by
SRAMSTS.
SRAM data register
SRAMAD
DR
[18:0
]
R/
W
04H-
07H
08H
SRAMDA
TA
SRAMCM
D
[31:0
]
[1:0]
R/
W
R/
W
SRAM command register
2’b00 : nop
2’b01 : read
2’b10 : write
To make a direct read to SRAM, write SRAMCMD by 2’b01. To
make a direct write to SRAM, write SRAMCMD by 2’b10.
Read/Write will cause the SRAMSTS = ”busy” immediately. As it is
done, SRAMSTS = “done”. A following read to SRAMSTS will
clear it to “idle”.
SRAM status register
2’b01 : read/write command done
2’b10 : busy (read/write in progress)
2’b00 : idle
SDRAM address register
09H
SRAMSTS [1:0] 0
R/O
10H-
13H
The data object addressed is in unit of 64 bits. The maximum
allowable SDRAM size is 128MB. For SDRAM direct access, the
CPU has to (1) set SDRAMADDR & SDRAMDATA, (2) issue
read/write command by SDRAMCMD, and (3) check command
status by SDRAMSTS.
SDRAM data register
SDRAMA
DDR
[23:0
]
R/
W
14H-
1BH
1CH
SDRAMD
ATA
SDRAMC
MD
[63:0
]
[1:0]
R/
W
R/
W
SDRAM command register
2’b00 : nop
2’b01 : read
2’b10 : write
To make a direct read to SDRAM, write SDRAMCMD by 2’b01. To
make a direct write to SDRAM, write SDRAMCMD by 2’b10.
Read/Write will cause the SDRAMSTS = ”busy” immediately. As it
is done, SDRAMSTS = “done”. A following read to SDRAMSTS
will clear it to “idle”.
SDRAM status register
2’b01 : read/write command done
2’b10 : busy (read/write in progress)
2’b00 : idle
1DH
SDRAMS
TS
[1:0] 0
R/O
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