VIA Technologies, Inc.
Preliminary VT6516 Datasheet
6
F
EATURES
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Single chip 16/12 ports 10/100M Ethernet switch controller
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Highly integrated single chip shared memory switch engine
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With option for 16 RMII (Reduced Media Independent Interface) ports or 12 MII
(Media Independent Interface) ports
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Non-blocking layer 2 switch, 148,810 packets/sec on each 100Mbps Ethernet port
Media Access Control (MAC)
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Dual 192-bytes FIFO’s of receive and transmit for each port
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CRC generator for outgoing packets from CPU port
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IEEE 802.3X compliant flow control for full duplex ports
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Backpressure for half duplex ports
Two switching mechanisms
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Supports ‘store and forward’ switching without forwarding CRC-bad packets
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Supports ‘cut through’ switching subject to long packets of length over 290 bytes for
100Mbps ports or of length over 98 bytes for 10Mbps ports
Packet buffering
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Glueless 64-bit interface to SDRAM as a packet buffer pool with size from 2M bytes
(SGRAM) to 512 M bytes
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1536 bytes for each packet buffer
External 32 bits SSRAM interface for forwarding table and memory link table
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Link list structure initialized by software
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2K up to 32K unicast/multicast addresses table entries with VLAN information
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Supports static entries for upper-layer multicast protocols, e.g. IGMP
Advanced address recognition
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Layer 2 MAC address recognition engine to enable wire-speed forwarding rate
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Self learning mechanism
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Supports multiple MAC address per-port from 2K up to 32K unicast/multicast
addresses
Switch management support
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Supports port mirroring (Sniffer feature)
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Supports spanning tree algorithm
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Supports CPU direct access to SDRAM and SSRAM
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Supports five statistical counters in each port
Supports I
2
C EEPROM interface for customized configuration
Support port-grouping VLAN
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Configurable server ports belonging to multiple VLAN groups
Support port-based trunking
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Three types of trunk grouping: one trunk group with 2 or 4 ports, two trunk groups
each with 2 ports
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Load balance according to MAC address and port number
CPU interface VIA 8/16 bits ISA-like interface
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