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參數(shù)資料
| 型號(hào)： | XRT72L71 |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 23/104頁 |
| 文件大?。?/td> | 1156K |
| 代理商： | XRT72L71 |
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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
PRELIMINARY
REV. P1.0.5
23
97
RxPOS
I
Receive Positive Data Input:
The exact role of this input pin depends upon
whether the UNI is operating in the Unipolar or Bipolar Mode.
Unipolar Mode:
This input pin functions as the “Single-Rail” input for the
“incoming” DS3 data stream. The signal at this input pin will be sampled and
latched (into the Receive DS3 Framer) on the “user-selected” edge of the
RxLineClk signal.
Bipolar Mode:
This input functions as one of the dual rail inputs for the
incoming AMI/B3ZS encoded DS3 data that has been received from an exter-
nal Line Interface Unit (LIU) IC. RxNEG functions as the other dual rail input
for the UNI. When this input pin is asserted, it means that the LIU has
received a “positive polarity” pulse from the line.
98
RxNEG
I
Receive Negative Data Input:
The exact role of this input pin depends upon
whether the UNI is operating in the Unipolar or Bipolar Mode.
Unipolar Mode:
This input pin is inactive, and should be pulled (“Low” or
"High") when the UNI is operating in the Unipolar Mode.
Bipolar Mode:
This input pin functions as one of the dual rail inputs for the
incoming AMI/B3ZS encoded DS3 data that has been received from an exter-
nal Line Interface Unit (LIU) IC. RxPOS functions as the other dual rail input
for the UNI. When this input pin is asserted, it means that the LIU has
received a “negative polarity” pulse from the line.
99
RxLineClk
I
Receive LIU (Recovered) Clock Input:
This input signal serves three pur-
poses:
1. The Receive DS3 Framer uses it to sample and “l(fā)atch” the signals at the
RxPOS and RxNEG input pins (into the Receive DS3 Framer circuitry).
2. This input signal functions as the timing reference for the Receive Framer
block.
3. The Transmit DS3 Framer block can be configured to use this input signal as
its timing reference.
N
OTE
:
Note: This signal is the recovered clock from the external DS3 LIU
(Line Interface Unit) IC, which is derived from the incoming DS3 data.
100
RxPRed
O
Receiver Red Alarm Indicator—Receive PLCP Processor:
The UNI
asserts this output pin to denote that one of the following events has been
detected by the Receive PLCP Processor:
OOF—Out of Frame Condition
LOF—Loss of Frame Condition
N
OTE
:
This output pin is only active whenever the XRT72L71 has been con-
figured to operate in the “ATM UNI” Mode.
101
RxRed
O
Receiver Red Alarm Indicator—Receive DS3 Framer:
The UNI asserts this
output pin to denote that one of the following conditions is currently being
declared by the Receive DS3 Framer block:
LOS—Loss of Signal Condition
OOF—Out of Frame Condition
AIS—Alarm Indication Signal Detection
N
OTE
:
This output pin is effectively, the “Wired-OR” of the “RxLOS”, the
“RxOOF” and the “RxAIS” output pins.
PIN DESCRIPTION (CONTINUED)
P
IN
N
O
.
S
YMBOL
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT72L73 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT72L74 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT7300IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7302 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
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