參數(shù)資料
型號: XRT72L71
廠商: Exar Corporation
元件分類: 通信及網絡
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 56/104頁
文件大小: 1156K
代理商: XRT72L71
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. P1.0.5
á
PRELIMINARY
56
T
ABLE
18:
R
X
DS3 I
NTERRUPT
S
TATUS
R
EGISTER
R
EGISTER
17 R
X
DS3 I
NTERRUPT
S
TATUS
R
EGISTER
H
EX
A
DDRESS
: 0
X
11
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
CP bit Error Interrupt Sta-
tus
RUR
0
0: No CP-bit errors have been detected since the last read of this register.
1: Indicates that at least one CP-bit error was detected since the last time
this register was read.
6
LOS Interrupt Status
RUR
0
0: LOS condition has NOT changed since the last read of this register.
1: LOS condition has changed since the last read of this register.
5
AIS Interrupt Status
RUR
0
0: AIS condition has NOT changed since the last read of this register.
1: AIS condition has changed since the last read of this register.
4
Idle Interrupt Status
RUR
0
0: Idle Condition has NOT changed since the last read of this register.
1: Idle Condition has changed since the last read of this register.
3
FERF Interrupt Status
RUR
0
0: FERF Condition has NOT changed since the last read of this register.
1: FERF Condition has changed since the last read of this register.
2
AIC Interrupt Status
RUR
0
0: AIC State has NOT changed since the last read of this register.
1: Validated AIC has changed since the last read of this register.
1
OOF Interrupt Status
RUR
0
0: OOF condition has NOT changed since the last read of this register.
1: OOF status has changed since the last read of this register.
0
P-Bit Error Interrupt Status
RUR
0
0: No P-bit Errors have been detected since the last read of this register.
1: Indicates that at least one P-bit error was detected since the last time this
register was read.
T
ABLE
19:
R
X
DS3 FEAC R
EGISTER
R
EGISTER
18 R
X
DS3 FEAC R
EGISTER
H
EX
A
DDRESS
: 0
X
12
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Unused
RO
0
6
Rx FEAC(0)
RO
1
RxFEAC[5:0] contains the most recently validated receive FEAC code word.
N
OTE
:
These bit-fields are only active if the XRT72L71 is configured to sup-
port the “C-bit Parity” Framing Forma
5
RxFEAC(1)
RO
1
4
RxFEAC(2)
RO
1
3
RxFEAC(3)
RO
1
2
RxFEAC(4)
RO
1
1
RxFEAC(5)
RO
1
0
Unused
RO
0
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