參數(shù)資料
型號： XRT72L71
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 75/104頁
文件大?。?/td> 1156K
代理商： XRT72L71
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
PRELIMINARY
REV. P1.0.5
75
T
ABLE
69:
R
X
PLCP C
ONFIGURATION
/S
TATUS
R
EGISTER
R
EGISTER
68 R
X
PLCP C
ONFIGURATION
/S
TATUS
R
EGISTER
H
EX
A
DDRESS
: 0
X
44
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-4
Unused
RO
0
3
PLCP Reframe
R/W
0
0 to 1 transition commands the Receive PLCP Processor block to transition
into the “FA1” and “FA2” octet search state, and to reacquire PLCP Frame
synchronization.
N
OTE
:
This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
2
POOF Status
RO
1
0: Indicates that the Receive PLCP Processor block is NOT currently declar-
ing an “Out of Frame” condition
1: Indicates that the Receive PLCP Processor block is currently declaring an
“Out of Frame” condition.
N
OTE
:
This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
1
PLOF Status
RO
1
0: Indicates that the Receive PLCP Processor block is NOT currently declar-
ing a “Loss of Frame” condition.
1: Indicates that the Receive PLCP Processor block is currently declaring a
“Loss of Frame” condition.
N
OTE
:
This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
0
PLCP Yellow Alarm
RO
0
0: Indicates that the Receive PLCP Processor is currently declaring a “Yellow
Alarm” condition.
1: Indicates that the Receive PLCP Processor is NOT currently declaring a
“Yellow Alarm” condition.
N
OTE
:
This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
T
ABLE
70:
R
X
PLCP I
NTERRUPT
E
NABLE
R
EGISTER
R
EGISTER
69 R
X
PLCP I
NTERRUPT
E
NABLE
R
EGISTER
H
EX
A
DDRESS
: 0
X
45
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-2
Unused
RO
0
1
POOF Interrupt Enable
R/W
0
0: The “Change in PLCP OOF Condition” Interrupt is disabled.
1: The “Change in PLCP OOF Condition” Interrupt is enabled.
N
OTE
:
This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
0
PLOF Interrupt Enable
R/W
0
0: The “Change in PLCP LOF Condition” Interrupt is disabled.
1: The “Change in PLCP LOF Condition” Interrupt is enabled.
N
OTE
:
This bit-field is only active if the XRT72L71is operating in both the
“ATM UNI” and the “PLCP” Mode.
相關PDF資料
PDF描述
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