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參數(shù)資料
| 型號(hào)： | XRT86VL32IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | DATACOM, FRAMER, PBGA225 |
| 封裝： | 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225 |
| 文件頁(yè)數(shù)： | 109/174頁(yè) |
| 文件大?。?/td> | 903K |
| 代理商： | XRT86VL32IB |
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XRT86VL32
104
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
3
LCV Int Status
RUR/
WC
0
Line Code Violation Interrupt Status
.
This Reset-Upon-Read bit field indicates whether or not the Receive E1 LIU
block has detected a Line Code Violation interrupt since the last read of this
register.
0 = Indicates that the Line Code Violation interrupt has not occurred since
the last read of this register.
1 = Indicates that the Line Code Violation interrupt has occurred since the
last read of this register.
2
Rx OOF State
Change
RUR/
WC
0
Change in Out of Frame Defect Condition Interrupt Status
.
This Reset-Upon-Read bit field indicates whether or not the “Change in
Receive Out of Frame Defect Condition” interrupt has occurred since the
last read of this register.
Out of Frame defect condition is declared when “FASC” number of consecu-
tive errored FAS patterns are detected, where “FASC” indicates the Loss of
FAS Alignment Criteria in the Framing Control Register (0xn10B), bit 2-0.
If this interrupt is enabled, then the Receive E1 Framer block will generate
an interrupt in response to either one of the following conditions.
1.
Whenever the Receive E1 Framer block declares the Out of Frame
defect condition.
2.
Whenever the Receive E1 Framer block clears the Out of Frame
defect condition
0 = Indicates that the “Change in Receive Out of Frame defect condition”
interrupt has not occurred since the last read of this register
1 = Indicates that the “Change in Receive Out of Frame defect condition”
interrupt has occurred since the last read of this register
1
RxAIS State
Change
RUR/
WC
0
Change in Receive AIS Condition Interrupt Status
.
This Reset-Upon-Read bit field indicates whether or not the “Change in
Receive AIS Condition” interrupt has occurred since the last read of this reg-
ister.
If this interrupt is enabled, then the Receive E1 Framer block will generate
an interrupt in response to either one of the following conditions.
1.
Whenever the Receive E1 Framer block declares the AIS condition.
2.
Whenever the Receive E1 Framer block clears the AIS condition
0 = Indicates that the “Change in Receive AIS condition” interrupt has not
occurred since the last read of this register
1 = Indicates that the “Change in Receive AIS condition” interrupt has
occurred since the last read of this register
T
ABLE
95: A
LARM
& E
RROR
I
NTERRUPT
S
TATUS
R
EGISTER
(AEISR) H
EX
A
DDRESS
: 0
X
nB02
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT86VL34_07 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34_1 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34_2 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86VL32IB-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 1-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86VL34 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
| XRT86VL34_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION |
| XRT86VL34_1 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
| XRT86VL34_2 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
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