參數(shù)資料
型號: XRT86VL32IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: DATACOM, FRAMER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 80/174頁
文件大?。?/td> 903K
代理商: XRT86VL32IB
XRT86VL32
75
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. V1.2.0
T
ABLE
60: R
ECEIVE
D
ATA
L
INK
B
YTE
C
OUNT
R
EGISTER
(RDLBCR3) H
EX
A
DDRESS
: 0
X
n155
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
RBUFPTR
R/W
0
Receive HDLC3 Buffer-Pointer
This bit Identifies which Receive HDLC3 buffer contains the most
recently received HDLC1 message.
0 - Indicates that Receive HDLC3 Buffer # 0 contains the contents of
the most recently received HDLC message.
1 - Indicates that Receive HDLC3 Buffer # 1 contains the contents of
the most recently received HDLC message.
6-0
RDLBC[6:0]
R/W
0000000
Receive HDLC Message - byte count
The exact function of these bits depends on whether the Receive
HDLC Controller Block #3 is configured to receive MOS or BOS
messages.
In BOS Mode:
These seven bits contain the number of repetitions the BOS mes-
sage must be received before the Receive HDLC3 controller gener-
ates the Receive End of Transfer (RxEOT) interrupt. If these bits are
set to “0000000”, the message will be received indefinitely and no
Receive End of Transfer (RxEOT) interrupt will be generated.
In MOS Mode:
These seven bits contain the size in bytes of the HDLC3 message
that has been received and written into the Receive HDLC buffer.
The length of MOS message shown in these bits include header
bytes such as the SAPI, TEI, Control field, AND the FCS bytes.
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