參數(shù)資料
型號: XRT86VL32IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: DATACOM, FRAMER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 150/174頁
文件大?。?/td> 903K
代理商: XRT86VL32IB
XRT86VL32
145
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. V1.2.0
4-0
EQC[4:0]
R/W
00000
Equalizer Control [4:0]:
These bits are used to control the transmit pulse shaping, transmit
line build-out (LBO) and receive sensitivity level.
The Transmit Pulse Shape can be controlled by adjusting the Trans-
mit Line Build-Out Settings for different cable length in E1 mode.
Transmit pulse shape can also be controlled by using the Arbitrary
mode, where users can specify the amplitude of the pulse shape by
using the 8 Arbitrary Pulse Segments provided in the LIU registers
(0x0Fn8-0xnFnF), where n is the channel number.
The XRT86VL32 device supports both long haul and short haul
applications which can also be selected using the EQC[4:0] bits.
Table 116 presents the corresponding Transmit Line Build Out and
Receive Sensitivity settings using different combinations of these
five EQC[4:0] bits.
T
ABLE
115: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (LIUCCR0) H
EX
A
DDRESS
: 0
X
0F
N
0
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
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