參數(shù)資料
型號(hào)： XRT86VL32IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： DATACOM, FRAMER, PBGA225
封裝： 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù)： 127/174頁
文件大?。?/td> 903K
代理商： XRT86VL32IB
XRT86VL32
122
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
T
ABLE
103: R
ECEIVE
L
OOPBACK
C
ODE
I
NTERRUPT
AND
S
TATUS
R
EGISTER
(RLCISR) H
EX
A
DDRESS
: 0
X
nB0A
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
AUXPSTAT
RO
0
AUXP state
This READ ONLY bit indicates whether or not the Receive E1
Framer Block is currently detecting Auxiliary (101010....) pattern.
0 = Indicates that the Receive E1 Framer Block is NOT currently
detecting the Auxiliary (101010....)Pattern.
1 = Indicates that the Receive E1 Framer Block is currently detect-
ing the Auxiliary (101010....)Pattern.
6
AUXPINT
RUR/WC
0
Change in Auxiliary Pattern interrupt Status
This Reset-Upon-Read bit field indicates whether or not the
“Change in Auxiliary Pattern” interrupt has occurred since the last
read of this register.
If this interrupt is enabled, then the Receive E1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive E1 Framer block detects the Auxiliary
Pattern.
2.
Whenever the Receive E1 Framer block no longer detects the
Auxiliary Pattern
0 = Indicates that the “Change in Auxiliary Pattern” interrupt has not
occurred since the last read of this register
1 = Indicates that the “Change in Auxiliary Pattern” interrupt has
occurred since the last read of this register
5
NONCRCSTAT
RO
0
CRC-4-to-non-CRC-4 interworking state
This READ ONLY bit indicates the status of CRC-4 interworking sta-
tus when Annex B is enabled. (MODENB bit in register 0xn107)
When Annex B is enabled, G.706 Annex B CRC-4 multiframe align-
ment algorithm is implemented. If CRC-4 alignment is enabled and
not achieved in 400msec while the basic frame alignment signal is
present, it is assumed that the remote end is a non CRC-4 equip-
ment. Then, a CRC-to-Non-CRC interworking interrupt status will be
generated.
0 = Indicates CRC-4 to non-CRC-4 interworking is NOT established.
1 = Indicates CRC-4 to non-CRC-4 interworking is established.
相關(guān)PDF資料
PDF描述
XRT86VL34_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL32IB-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 1-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL34 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL34_07 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL34_1 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL34_2 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
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