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參數(shù)資料
| 型號(hào)： | XRT86VL32IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | DATACOM, FRAMER, PBGA225 |
| 封裝： | 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225 |
| 文件頁(yè)數(shù)： | 95/174頁(yè) |
| 文件大小： | 903K |
| 代理商： | XRT86VL32IB |
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XRT86VL32
90
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
T
ABLE
71: LAPD B
UFFER
0 C
ONTROL
R
EGISTER
(LAPDBCR0) H
EX
A
DDRESS
: 0
X
n600
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
LAPD Buffer 0
R/W
0
LAPD Buffer 0 (96-Bytes) Auto Incrementing
This register is used to transmit and receive LAPD messages within
buffer 0 of the HDLC controller. Any one of the HDLC controller can
be is chosen in the LAPD Select Register (0xn11B). Users should
determine the next available buffer by reading the BUFAVAL bit (bit
7 of the Transmit Data Link Byte Count Register 1 (address 0xn114),
Register 2 (0xn144) and Register 3 (0xn154) depending on which
HDLC controller is selected. If buffer 0 is available, writing to buffer 0
will insert the message into the outgoing LAPD frame after the
LAPD message is sent and the data from the transmit buffer cannot
be retrieved.
After detecting the Receive end of transfer interrupt (RxEOT), users
should read the RBUFPTR bit (bit 7 of the Receive Data Link Byte
Count Register 1 (address 0xn115), Register 2 (0xn145), or Regis-
ter 3 (0xn155) depending on which HDLC controller is selected) to
determine which buffer contains the received LAPD message ready
to be read. If RBUFPTR bit indicates that buffer 0 is available to be
read, reading buffer 0 (Register 0xn600) continuously will retrieve
the entire received LAPD message.
N
OTE
:
When writing to or reading from Buffer 0, the register is
automatically incremented such that the entire 96 Byte
LAPD message can be written into or read from buffer 0
(Register 0xn600) continuously.
T
ABLE
72: LAPD B
UFFER
1 C
ONTROL
R
EGISTER
(LAPDBCR1) H
EX
A
DDRESS
: 0
X
n700
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
LAPD Buffer 1
R/W
0
LAPD Buffer 1 (96-Bytes) Auto Incrementing
This register is used to transmit and receive LAPD messages within
buffer 1 of the HDLC controller. Any one of the HDLC controller can
be is chosen in the LAPD Select Register (0xn11B). Users should
determine the next available buffer by reading the BUFAVAL bit (bit
7 of the Transmit Data Link Byte Count Register 1 (address 0xn114),
Register 2 (0xn144) and Register 3 (0xn154) depending on which
HDLC controller is selected. If buffer 1 is available, writing to buffer 1
will insert the message into the outgoing LAPD frame after the
LAPD message is sent and the data from the transmit buffer 1 can-
not be retrieved.
After detecting the Receive end of transfer interrupt (RxEOT), users
should read the RBUFPTR bit (bit 7 of the Receive Data Link Byte
Count Register 1 (address 0xn115), Register 2 (0xn145), or Regis-
ter 3 (0xn155) depending on which HDLC controller is selected) to
determine which buffer contains the received LAPD message ready
to be read. If RBUFPTR bit indicates that buffer 1 is available to be
read, reading buffer 1 (Register 0xn700) continuously will retrieve
the entire received LAPD message.
N
OTE
:
When writing to or reading from Buffer 0, the register is
automatically incremented such that the entire 96 Byte
LAPD message can be written into or read from buffer 0
(Register 0xn600) continuously.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT86VL34_07 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34_1 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34_2 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86VL32IB-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 1-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86VL34 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
| XRT86VL34_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION |
| XRT86VL34_1 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
| XRT86VL34_2 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
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