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參數(shù)資料
| 型號： | 23913A |
| 英文描述： | Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF) |
| 中文描述： | 嵌入式的AMD - K6處理器的BIOS設(shè)計指南應(yīng)用筆記？ 1.33MB（PDF格式） |
| 文件頁數(shù)： | 18/98頁 |
| 文件大?。?/td> | 1365K |
| 代理商： | 23913A |
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6
BIOS Consideration Checklist
Embedded AMD-K6 Processors BIOS Design Guide
23913A/0—November 2000
Preliminary Information
BIOS Consideration Checklist
CPUID
I
Use the CPUID instruction to properly identify the
processor. For information on the CPUID instruction, see
“CPUID Instruction Overview” on page 57.
Determine the processor model, stepping, and features
using functions 0000_0001h and 8000_0001h of the CPUID
instruction.
Display the processor name (BIOS boot strings) as described
in “CPUID Identification Algorithms” on page 11.
I
I
CPU Speed Detection
I
Use speed detection algorithms that do not rely on
repetitive instruction sequences.
Use the Time Stamp Counter (TSC) to ‘clock’ a timed
operation and compare the result to the real-time clock
(RTC) to determine the operating frequency. See the
CPU
Speed Determination Program
available on the AMD website
at http://www.amd.com/products/cpg/bin/.
Display the recommended BIOS boot string as shown in
Table 5 on page 11.
I
I
Model-Specific Registers (MSRs)
I
Only access MSRs implemented in the processor.
Enable write allocation by programming the Write Handling
Control Register (WHCR). See “Write Handling Control
Register (WHCR)” on page 19 and page 27, and the
Implementation of Write Allocate in the K86 Processors
Application Note
, order# 21326
for more information.
Note:
The WHCR register as defined in models 7 and 8/[7:0] is
implemented differently in models 8/[F:8], 9, and D.
I
I
For the AMD-K6-2E, AMD-K6-2E+, AMD-K6-III, and
AMD-K6-IIIE+ processors, utilize the information provided
in the Processor State Observability Register (PSOR) to
display the correct processor bus frequency.
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