參數(shù)資料
型號： 23913A
英文描述： Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF)
中文描述： 嵌入式的AMD - K6處理器的BIOS設(shè)計指南應(yīng)用筆記？ 1.33MB（PDF格式）
文件頁數(shù)： 75/98頁
文件大?。?/td> 1365K
代理商： 23913A
Embedded AMD Processor Recognition
63
23913A/0—November 2000
Embedded AMD-K6 Processors BIOS Design Guide
Preliminary Information
Identifying Supported Features
The feature bits are returned in the EDX register for two
CPUID functions—standard function 1 and extended function
8000_0001h. Each bit corresponds to a specific feature and
indicates if that feature is present on the processor. Table 30
summarizes the standard and extended feature bits.
Table 30. Standard and Extended Feature Bits
Bit
1
0
1
2
3
Feature
Floating-Point Unit
Virtual Mode Extensions
Debugging Extensions
PSE (Page Size Extensions)
Time Stamp Counter
(with RDTSC and CR4 disable bit)
K86 Family of Processors’
Model-Specific Registers (with
RDMSR and WRMSR)
Description
A floating-point unit is available.
Virtual mode extensions are available.
I/O breakpoint debug extensions are supported.
4-Mbyte pages are supported.
A time stamp counter is available in the processor,
and the RDTSC instruction is supported.
The K86 model-specific registers are available in the
processor, and the RDMSR and WRMSR instructions
are supported.
Page address extensions are supported using an
8-byte directory entry.
The machine check exception is supported.
The CMPXCHG8B instruction is supported.
A local APIC unit is available.
Standard
2
1
1
1
1
Extended
2
1
1
1
1
4
1
1
5
1
1
6
PAE (Page Address Extensions)
1
1
7
8
9
10
MCE (Machine Check Exception)
CMPXCHG8B Instruction
APIC
Reserved on all AMD processors
1
1
1
0
1
1
1
0
11
SYSENTER/SYSEXIT Instructions
The SYSENTER and SYSEXIT instructions are
supported.
The SYSCALL and SYSRET instructions and
associated extensions are supported.
1
0
SYSCALL and SYSRET Instructions
0
1
12
MTRR (Memory Type Range
Registers)
Global Paging Extension
MCA (Machine Check Architecture) Machine check architecture is supported
The conditional move instructions CMOV, FCMOV,
and FCOMI are supported.
PAT (Page Attribute Table)
The Page attribute tables are supported.
Page size extensions for 36-bit addresses are
supported using a 4-byte directory entry.
18–21
Reserved on all AMD processors
AMD Multimedia Instruction
Extensions
are supported.
3
Memory type range registers are available.
1
1
13
14
Global paging extensions are available.
1
1
1
1
15
Conditional Move Instructions
1
1
16
1
1
17
PSE-36 (Page Size Extension)
1
1
0
0
22
AMD additions to the original MMX instruction set
0
1
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