參數(shù)資料
型號: 23913A
英文描述: Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF)
中文描述: 嵌入式的AMD - K6處理器的BIOS設(shè)計指南應(yīng)用筆記? 1.33MB(PDF格式)
文件頁數(shù): 45/98頁
文件大?。?/td> 1365K
代理商: 23913A
Model 8/[F:8] Registers
33
23913A/0—November 2000
Embedded AMD-K6 Processors BIOS Design Guide
Preliminary Information
Examples
Suppose that the range of memory from 16 Mbytes to 32 Mbytes
is uncacheable, and the 8-Mbyte range of memory on top of 1
Gbyte is write-combinable. Range 0 is defined as the
uncacheable range, and range 1 is defined as the write-
combining range.
I
Extracting the 15 most-significant bits of the 32-bit physical
base address that corresponds to 16 Mbytes (0100_0000h)
yields
a
physical
base
000_0000_1000_0000b. Because the uncacheable range size
is 16 Mbytes, the physical mask value 0 field is
111_1111_1000_0000b, according to Table 16 on page 32. Bit
1 of the UWCCR register (WC0) is set to 0, and bit 0 of the
UWCCR register is set to 1 (UC0).
Extracting the 15 most-significant bits of the 32-bit physical
base address that corresponds to 1 Gbyte (4000_0000h)
yields
a
physical
base
010_0000_0000_0000b. Because the write-combining range
size is 8 Mbytes, the physical mask value 1 field is
111_1111_1100_0000b, according to Table 16. Bit 33 of the
UWCCR register (WC1) is set to 1 and bit 32 of the UWCCR
register is set to 0 (UC1).
address
0
field
of
I
address
1
field
of
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