參數(shù)資料
型號(hào): 23913A
英文描述: Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF)
中文描述: 嵌入式的AMD - K6處理器的BIOS設(shè)計(jì)指南應(yīng)用筆記? 1.33MB(PDF格式)
文件頁數(shù): 63/98頁
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代理商: 23913A
Model D Registers
51
23913A/0—November 2000
Embedded AMD-K6 Processors BIOS Design Guide
Preliminary Information
When the L2AAR is read or written, EDX is left unchanged.
This facilitates multiple accesses when testing the entire
cache/tag array.
If the L2 cache data is read (as opposed to reading the tag
information), the result (dword) is placed in EAX in the format
as illustrated in Figure 22. Similarly, if the L2 cache data is
written, the write data is taken from EAX.
Figure 22. L2 Data—EAX (same as Figure 14)
If the L2 tag is read (as opposed to reading the cache data), the
result is placed in EAX in the format as illustrated in Figure 23
on page 52 (AMD-K6-2E+ processor) and Figure 24
(AMD-K6-IIIE+ processor). Similarly, if the L2 tag is written,
the write data is taken from EAX.
When accessing the L2 tag, the Line, Octet, and Dword fields of
the EDX register are ignored.
Table 24. Tag versus Data Selector (same as Table 21)
Instruction
T/D
(EDX[20])
Operation
RDMSR
0
Read dword from L2 data array into EAX. Dword location
is specified by EDX.
RDMSR
1
Read tag, line state and LRU information from L2 tag array
into EAX. Location of tag is specified by EDX.
WRMSR
0
Write dword to the L2 data array using data in EAX. Dword
location is specified by EDX.
WRMSR
1
Write tag, line state and LRU information into L2 tag array
from EAX. Location of tag is specified by EDX.
0
31
Data
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