參數資料
型號: 23913A
英文描述: Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF)
中文描述: 嵌入式的AMD - K6處理器的BIOS設計指南應用筆記? 1.33MB(PDF格式)
文件頁數: 92/98頁
文件大?。?/td> 1365K
代理商: 23913A
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Appendix A
Embedded AMD-K6 Processors BIOS Design Guide
23913A/0—November 2000
Preliminary Information
Cache Associativity Field Definitions
This section describes the values returned in the associativity fields.
Associativity for L1
Caches and L1 TLBs
The associativity fields for the L1 data cache, L1 instruction
cache, L1 data TLB, and L1 instruction TLB are all 8 bits wide.
Except for 00h (Reserved) and FFh (Full), the number returned
in the associativity field represents the actual number of ways,
with a range of 01h through FEh. For example, a returned value
of 02h indicates 2-way associativity and a returned value of 04h
indicates 4-way associativity.
Associativity for L2
Cache
The associativity field for the L2 cache is 4 bits wide. Table 38
shows the value returned in the associativity field.
Table 38.
Associativity Values for L2 Cache
Bits 15–12
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
Associativity
L2 off
Direct-mapped
2-way
Reserved
4-way
Reserved
8-way
Reserved
16-way
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Full
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