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| 型號(hào)： | 23913A |
| 英文描述： | Embedded AMD-K6 Processors BIOS Design Guide Application Note? 1.33MB (PDF) |
| 中文描述： | 嵌入式的AMD - K6處理器的BIOS設(shè)計(jì)指南應(yīng)用筆記？ 1.33MB（PDF格式） |
| 文件頁數(shù)： | 36/98頁 |
| 文件大小： | 1365K |
| 代理商： | 23913A |
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24
Model 8/[F:8] Registers
Embedded AMD-K6 Processors BIOS Design Guide
23913A/0—November 2000
Preliminary Information
Extended Feature Enable Register (EFER)
The Extended Feature Enable Register (EFER) contains the
control bits that enable the extended features of the processor.
Figure 5 shows the format of the EFER register, and Table 13
defines the function of each bit of the EFER register. The EFER
register is MSR C000_0080h.
Note:
The EFER register as defined in models 7 and 8/[7:0] is
defined differently in Model 8/[F:8]. A complete description
of the newly defined register is included in this section for
Model 8/[F:8].
Figure 5. Extended Feature Enable Register (EFER) (Model 8/[F:8])
External Write Buffer
Empty Control Field
Model 8/[F:8] contains an 8-byte write merge buffer that allows
the processor to conditionally combine data from multiple
noncacheable write cycles into this merge buffer. The merge
Table 13. Extended Feature Enable Register (EFER) Definition (Model 8/[F:8])
Bit
Description
R/W
Function
Writing a 1 to any reserved bit causes a general protection
fault to occur. All reserved bits are always read as 0.
This 2-bit field controls the behavior of the processor with
respect to the ordering of write cycles and the EWBE# signal.
EFER[3] and EFER[2] are Global EWBE# Disable (GEWBED)
and Speculative EWBE Disable (SEWBED), respectively.
DPE must be set to 1 to enable data prefetching (this is the
default setting following reset). If enabled, cache misses initi-
ated by a memory read within a 32-byte cache line are con-
ditionally followed by cache-line fetches of the other line in
the 64-byte sector.
SCE must be set to 1 to enable the usage of the SYSCALL and
SYSRET instructions.
63–4
Reserved
R
3-2
EWBE# Control (EWBEC)
R/W
1
Data Prefetch Enable (DPE)
R/W
0
System Call Extension (SCE)
R/W
1
0
63
S
C
E
Reserved
Description
EWBE Control
Data Prefetch Enable
System Call Extension
2
3
4
D
P
E
EWBEC
Symbol
EWBEC
DPE
SCE
Bit
3-2
1
0
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