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參數(shù)資料
| 型號： | 84225 |
| 廠商： | LSI Corporation |
| 英文描述： | Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device （Highly Integrated Ethernet Transceiver For Twisted Pair And Fiber Ethernet Applications）(四通道100BaseTX/100BaseFX/10BaseT 物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器）) |
| 中文描述： | 四100BaseTX/100BaseFX/10BaseT物理層裝置（高度集成的以太網(wǎng)收發(fā)器，雙絞線和光纖以太網(wǎng)的應(yīng)用）（四通道100BaseTX/100BaseFX/10BaseT物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器） ） |
| 文件頁數(shù)： | 12/86頁 |
| 文件大?。?/td> | 1297K |
| 代理商： | 84225 |
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12
MD400183/A
84225
2.0 Functional Description
2.1 GENERAL
The 84225 is a complete 10/100 Mbps Ethernet Media
Interface IC. The 84225 has four separate and
independent channels. Each channel has the following
main sections: controller interface, encoder, decoder,
scrambler, descrambler, clock and data recovery, twisted
pair and fiber interface transmitter, twisted pair and fiber
interface receiver, and auto negotiation. A Management
Interface (MI) serial port, which provides access to eleven
registers for each channel, is common to all four channels.
Figure 1 shows the 84225 block diagram.
The 84225 can operate as a 100BaseTX or 100BaseFX
device (100 Mbps mode) or as a 10BaseT device (10
Mbps mode). The 100 Mbps and 10 Mbps modes differ in
data rate, signalling protocol, and allowed wiring as
follows:
The 100 Mbps FX mode uses two iber connections with
4B5B encoded NRZI 125 MHz binary data through an
ECL-type driver to achieve a throughput of 100 Mbps.
The 100 Mbps TX mode uses two pairs of category 5,
or better, UTP or STP twisted pair cable with 4B5B
encoded, scrambled, and MLT3 coded (ternary) 125
MHz data to achieve a throughput of 100 Mbps.
The 10 Mbps mode uses two pairs of category 3, or
better, UTP or STP twisted pair cable with Manchester
encoded 10 MHz binary data to achieve a 10 Mbps
thruput.
The data symbol format on the fiber or twisted pair cable
for the 100 and 10 Mbps modes is defined in IEEE 802.3
specifications and shown in Figure 2.
On the transmit side for 100 Mbps operation, data is
received on the controller interface from an external
Ethernet controller per the format shown in Figure 3. The
data is sent to the encoder for formatting. For TX
operation, the encoded data is sent to the scrambler. The
encoded and scrambled data is then sent to the TX
transmitter. The transmitter converts the encoded and
Figure 2. Frame Format
PREAMBLE
SFD
DA
LLC DATA
FCS
SA
INTERFRAME
GAP
ETHERNET MAC FRAME
LN
INTERFRAME
GAP
SSD
PREAMBLE
SFD
LLC DATA
FCS
DA
IDLE
100 BASE-TX DATA SYMBOLS
SA
IDLE
LN
ESD
= [ 1 1 1 1 ...]
= [ 1 1 0 0 0 1 0 0 0 1 ]
= [ 0 1 1 0 1 0 0 1 1 1 ]
= [ DATA ]
= [ 1 1 ]
= [ 1 0 1 0 ...] 62 BITS LONG
ESD
DA, SA, LN, LLC DATA, FCS
SSD
PREAMBLE
SFD
IDLE
BEFORE / AFTER
4B5B ENCODING,
SCRAMBLING, AND
MLT3 CODING
PREAMBLE
SFD
LLC DATA
FCS
DA
IDLE
10 BASE-T DATA SYMBOLS
SA
IDLE
LN
SOI
= [ NO TRANSITIONS ]
= [ 1 0 1 0 ... ] 62 BITS LONG
= [ 1 1 ] WITH NO MID BIT
TRANSITION
= [ DATA ]
= [ 1 1 ]
SOI
DA, SA, LN, LLC DATA, FCS
SFD
PREAMBLE
IDLE
BEFORE / AFTER
MANCHESTER
ENCODING
SSD
PREAMBLE
SFD
LLC DATA
FCS
DA
IDLE
100 BASE-FX DATA SYMBOLS
SA
IDLE
LN
ESD
= [ 1 1 1 1 ...]
= [ 1 1 0 0 0 1 0 0 0 1 ]
= [ 0 1 1 0 1 0 0 1 1 1 ]
= [ DATA ]
= [ 1 1 ]
= [ 1 0 1 0 ...] 62 BITS LONG
ESD
DA, SA, LN, LLC DATA, FCS
SSD
PREAMBLE
SFD
IDLE
BEFORE / AFTER
4B5B ENCODING,
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