參數(shù)資料
型號： AM79C974
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
中文描述： PCnetTM -的SCSI結合以太網(wǎng)和SCSI控制器PCI系統(tǒng)
文件頁數(shù)： 24/153頁
文件大?。?/td> 838K
代理商： AM79C974
AMD
P R E L I M I N A R Y
24
Am79C974
SCSI Controller Pins
SCSI Bus Interface Signals
SCSI Bus Pins
SD
[7:0]
SCSI Data
Input/Output, Active Low, Open Drain/Active
Negation, Schmitt Trigger
These pins are defined as bi-directional SCSI data bus.
SD
P
SCSI Data Parity
Input/Output, Active Low, Open Drain/Active
Negation, Schmitt Trigger
This pin is defined as bi-directional SCSI data parity.
MSG
Message
Input, Active Low, Schmitt Trigger
It is a Schmitt trigger input in the initiator mode.
C/D
Command/Data
Input, Schmitt Trigger
It is a Schmitt trigger input in the initiator mode.
I/O
Input/Output
Input, Schmitt Trigger
It is a Schmitt trigger input in the initiator mode.
ATN
Attention
Output, Active Low, Open Drain
This signal is a 48 mA output in the initiator mode. This
signal will be asserted when the device detects a parity
error; also, it can be asserted via certain commands.
BSY
Busy
Input/Output, Active Low, Schmitt Trigger,
Open Drain
As a SCSI input signal it has a Schmitt trigger and as an
output signal it has a 48 mA drive.
SEL
Select
Input/Output, Active Low, Schmitt Trigger,
Open Drain
As a SCSI input signal it has a Schmitt trigger and as an
output signal it has a 48 mA drive.
SCSI^RST
Reset
Input/Output
,
Active Low, Schmitt Trigger,
Open Drain
As a SCSI input signal it has a Schmitt trigger and as an
output signal it has a 48 mA drive.
REQ
Request
Input, Active Low, Schmitt Trigger
This is a SCSI input signal with a Schmitt trigger in the
initiator mode.
ACK
Acknowledge
Output
,
Active Low, Open Drain/Active Negation
This is a SCSI output signal with a 48 mA drive in the
initiator mode.
SCSI CLK
SCSI Clock
Input
The SCSI clock signal is used to generate all internal de-
vice timings. The maximum frequency of this input is
40MHz and a minimum of 10 MHz is required to main-
tain the SCSI bus timings.
Note:
A 40 MHz clock must be supplied at this nput to achieve
10 Mbyte/s Synchronous Fast SCSI transfers.
PWDN
Power Down Indicator
Input, Active High
This signal, when asserted, sets the PWDN status bit in
the DMA status register and sends an interrupt to
thehost.
Test Interface
BUSY
NAND Tree Out
Output, Active Low
This signal is logically equivalent to the SCSI bus signal
BSY
. It is duplicated so that external logic can be
connected to monitor SCSI bus activity.
The results of the NAND tree testing can be observed on
the
BUSY
pin where
RST
is asserted; otherwise,
BUSY
will reflect the state of the SCSI Bus Signal line
BSY
(pin64).
相關PDF資料
PDF描述
AM79C974KCW PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
AM79C975 PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C973 PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C973KCW PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C975KCW PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
相關代理商/技術參數(shù)
參數(shù)描述
AM79C974KC 制造商:Advanced Micro Devices 功能描述:
AM79C974KC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C974KCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
AM79C975 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
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