參數(shù)資料
型號: AM79C974
廠商: Advanced Micro Devices, Inc.
英文描述: PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
中文描述: PCnetTM -的SCSI結(jié)合以太網(wǎng)和SCSI控制器PCI系統(tǒng)
文件頁數(shù): 42/153頁
文件大?。?/td> 838K
代理商: AM79C974
AMD
P R E L I M I N A R Y
42
Am79C974
Master Abort
The Am79C974 controller will terminate its cycle with a
Master Abort sequence if
DEVSEL
is not asserted within
4 clocks after
FRAME
is asserted. Master Abort is
treated as a fatal error by the Am79C974 controller. For
the Ethernet, the Am79C974 controller will reset all CSR
and BCR locations to their H_RESET values. Any
on-going network activity will be stopped immediately.
The PCI configuration registers will not be cleared. For
SCSI, when the master aborts,
INTA
will not be as-
serted, but the ABORT bit (bit 2 of the DMA status regis-
ter at offset 54h), is set. For either Ethernet or SCSI
master abort causes RMABORT (bit 13) of the status
register in the appropriate PCI configuration space to
beset.
18681A-20
FRAME
CLK
AD
IRDY
TRDY
C/
BE
DEVSEL
REQ
GNT
1
2
3
4
5
6
7
8
ADDR
DATA
0000
0111
10
9
PAR
PAR
PAR
DEVSEL
is sampled by the Am79C974 controller.
Figure 16. Master Abort
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