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參數(shù)資料
| 型號(hào)： | AM79C974 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| 中文描述： | PCnetTM -的SCSI結(jié)合以太網(wǎng)和SCSI控制器PCI系統(tǒng) |
| 文件頁(yè)數(shù)： | 60/153頁(yè) |
| 文件大小： | 838K |
| 代理商： | AM79C974 |
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AMD
P R E L I M I N A R Y
60
Am79C974
H_RESET function.
EEPROM programming of the DWIO mode bit of
BCR18.
Automatic determination of DWIO mode due to
DWORD (double-word) I/O write access to offset
10h.
The Ethernet controller I/O mode setting will default to
WIO after H_RESET (i.e. DWIO = 0).
Following the H_RESET operation, a PREAD operation
of the EEPROM will be executed. If the EEPROM is pro-
grammed with a ONE in the DWIO bit position and the
EEPROM checksum is correct, then the EEPROM read
will result in the setting of the DWIO mode to a ONE.
If the EEPROM programming was absent, failed, or con-
tained a ZERO in the DWIO bit position, then the soft-
ware may invoke DWIO mode by performing a Double
Word write access to the I/O location at offset 10h
(RDP). Note that even though the I/O resource mapping
changes when the I/O mode setting changes, the RDP
location offset is the same for both modes.
1-, 2- and 3-byte accesses to Ethernet controller I/O re-
sources are not allowed during DWIO mode.
The mapping of the Ethernet controller resources into
the 32-byte I/O space varies depending upon the setting
of the DWIO bit of BCR10. Depending upon the setting
of this variable, the 32-byte I/O space will be either Word
I/O mapped (WIO) or Double Word I/O mapped (DWIO).
A DWIO setting of 0 produces Word I/O mode, while a
DWIO setting of 1 produces Double Word I/O mapping.
DWIO is automatically programmed as active when the
system attempts a DWORD write access to offset 10h of
the Ethernet controller I/O space. As long as no
DWORD write access to offset 10h of the Ethernet con-
troller I/O space is performed, the Ethernet controller
will use the value of DWIO that was programmed from
the EEPROM read operation. If no EEPROM is used in
the system, then the power up reset value of DWIO will
be ZERO, and this value will be maintained until a
DWORD access is performed to Ethernet controller I/O
space.
Therefore, if DWIO mode is desired, it is imperative that
the first access to the Ethernet controller be a DWORD
write access to offset 10h, unless the EEPROM will be
used to program the DWIO bit.
Alternatively, if DWIO mode is not desired, then it is im-
perative that the software never executes a DWORD
write access to offset 10h of the Ethernet controller I/O
space, and the EEPROM programming of the DWIO bit
must be ZERO.
Once the DWIO bit has been set to a ONE, only a hard-
ware H_RESET or a new read of the EEPROM can re-
set it to a ZERO.
The DWIO mode setting is unaffected by the S_RESET
or setting the STOP bit.
WIO I/O Resource Map
When the Ethernet controller I/O space is mapped as
Word I/O, then the resources that are allotted to the
Ethernet controller occur on word boundaries that are
offset from the Ethernet controller I/O base address as
shown in the table below:
No. of
Bytes
Offset
Register
0h
2
APROM
2h
2
APROM
4h
2
APROM
6h
2
APROM
8h
2
APROM
Ah
2
APROM
Ch
2
APROM
Eh
2
APROM
10h
2
RDP
12h
2
RAP (shared by RDP and BDP)
14h
2
Reset Register
16h
2
BDP
18h
2
Vendor Specific Word
1Ah
2
Reserved
1Ch
2
Reserved
1Eh
2
Reserved
When Ethernet controller I/O space is Word mapped, all
I/O resources fall on word boundaries and all I/O re-
sources are word quantities. However, while in Word I/O
mode, APROM locations may also be accessed as indi-
vidual bytes either on odd or even byte addresses.
Attempts to write to any Ethernet controller I/O re-
sources (except to offset 10h, RDP)as 32 bit quantities
while in Word I/O mode are illegal and may cause unex-
pected reprogramming of the Ethernet controller control
registers. Attempts to readfrom any Ethernet controller
I/O resources as 32-bit quantities while in Word I/O
mode are illegal and will yield undefinedvalues.
An attempt to write to offset 10h (RDP) as a 32 bit quan-
tity while in Word I/O mode will cause the Ethernet con-
troller to exit WIO mode and immediately thereafter, to
enter DWIO mode.
Word accesses to non word address boundaries are not
allowed while in WIO mode. (A write access may cause
unexpected reprogramming of the Ethernet controller
control registers. A read access will yield undefined
values.)
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PDF描述 |
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| AM79C974KCW | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| AM79C975 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C974KC | 制造商:Advanced Micro Devices 功能描述: |
| AM79C974KC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C974KCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| AM79C975 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
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